Texas Instruments warranty TMS320C6727, TMS320C6726, TMS320C6722, 2.9.2Terminal Functions

TMS320C6727, TMS320C6726, TMS320C6722

Floating-Point Digital Signal Processors

www.ti.com

SPRS268E –MAY 2005 –REVISED JANUARY 2007

2.9.2Terminal Functions

Table 2-12, the Terminal Functions table, identifies the external signal names, the associated pin/ball numbers along with the mechanical package designator, the pin type (I, O, IO, OZ, or PWR), whether the pin/ball has any internal pullup/pulldown resistors, whether the pin/ball is configurable as an IO in GPIO mode, and a functional pin description.

Table 2-12. Terminal Functions

SIGNAL NAME	RFP	GDH/	TYPE (1)	PULL (2)	GPIO (3)	DESCRIPTION
		ZDH
		External Memory Interface (EMIF) Address and Control
EM_A[0]	91	J16	O	-	N
EM_A[1]	89	J15	O	-	N
EM_A[2]	88	K15	O	-	N
EM_A[3]	86	L16	O	-	N
EM_A[4]	84	L15	O	-	N
EM_A[5]	83	M16	O	-	N
EM_A[6]	80	M15	O	-	N	EMIF Address Bus
EM_A[7]	79	N16	O	-	N
EM_A[8]	76	N15	O	-	N
EM_A[9]	75	P16	O	-	N
EM_A[10]	93	H15	O	-	N
EM_A[11]	74	P15	O	-	N
EM_A[12]	-	P12	O	IPD	N
EM_BA[0]	96	G15	O	-	N	SDRAM Bank Address and Asynchronous Memory
EM_BA[1]	94	H16	O	-	N	Low-Order Address
EM_CS[0]	97	F15	O	-	N	SDRAM Chip Select
EM_CS[2]	100	E15	O	-	N	Asynchronous Memory Chip Select
EM_CAS	37	R3	O	-	N	SDRAM Column Address Strobe
EM_RAS	98	F16	O	-	N	SDRAM Row Address Strobe
EM_WE	38	T3	O	-	N	SDRAM/Asynchronous Write Enable
EM_CKE	71	T14	O	-	N	SDRAM Clock Enable
EM_CLK	70	R14	O	-	N	EMIF Output Clock
EM_WE_DQM[0]	39	R4	O	-	N	Write Enable or Byte Enable for EM_D[7:0]
EM_WE_DQM[1]	67	T13	O	-	N	Write Enable or Byte Enable for EM_D[15:8]
EM_WE_DQM[2]	-	P13	O	IPU	N	Write Enable or Byte Enable for EM_D[23:16]
EM_WE_DQM[3]	-	R15	O	IPU	N	Write Enable or Byte Enable for EM_D[31:24]
EM_OE	104	D15	O	-	N	SDRAM/Asynchronous Output Enable
EM_RW	102	E16	O	-	N	Asynchronous Memory Read/not Write
EM_WAIT	-	D14	I	IPU	N	Asynchronous Wait Input (Programmable Polarity) or
						Interrupt (NAND)

(1)TYPE column refers to pin direction in functional mode. If a pin has more than one function with different directions, the functions are separated with a slash (/).

(2)PULL column:

IPD = Internal Pulldown resistor IPU = Internal Pullup resistor

(3)If the GPIO column is 'Y',then in GPIO mode, the pin is configurable as an IO unless otherwise marked.

Submit Documentation Feedback Device Overview 21