TMS320C6727, TMS320C6726, TMS320C6722

Floating-Point Digital Signal Processors

www.ti.com

SPRS268E –MAY 2005 –REVISED JANUARY 2007

4.15.3 I2C Electrical Data/Timing

4.15.3.1 Inter-Integrated Circuit (I2C) Timing

Table 4-34and Table 4-35assume testing over recommended operating conditions (see Figure 4-38and Figure 4-39).

Table 4-34. I2C Input Timing Requirements

NO.

1tc(SCL)

2tsu(SCLH-SDAL)

3th(SCLL-SDAL)

4tw(SCLL)

5tw(SCLH)

6tsu(SDA-SCLH)

7th(SDA-SCLL)

8tw(SDAH)

9tr(SDA)

10tr(SCL)

11tf(SDA)

12tf(SCL)

13tsu(SCLH-SDAH)

14tw(SP)

15Cb

Cycle time, I2Cx_SCL

Setup time, I2Cx_SCL high before I2Cx_SDA low

Hold time, I2Cx_SCL low after I2Cx_SDA low

Pulse duration, I2Cx_SCL low

Pulse duration, I2Cx_SCL high

Setup time, I2Cx_SDA before I2Cx_SCL high

Hold time, I2Cx_SDA after I2Cx_SCL low

Pulse duration, I2Cx_SDA high

Rise time, I2Cx_SDA

Rise time, I2Cx_SCL

Fall time, I2Cx_SDA

Fall time, I2Cx_SCL

Setup time, I2Cx_SCL high before I2Cx_SDA high

Pulse duration, spike (must be suppressed)

Capacitive load for each bus line

 

MIN

MAX UNIT

Standard Mode

10

μs

Fast Mode

2.5

 

Standard Mode

4.7

μs

Fast Mode

0.6

 

Standard Mode

4

μs

Fast Mode

0.6

 

Standard Mode

4.7

μs

Fast Mode

1.3

 

Standard Mode

4

μs

Fast Mode

0.6

 

Standard Mode

250

ns

Fast Mode

100

 

Standard Mode

0

μs

Fast Mode

0

0.9

Standard Mode

4.7

μs

Fast Mode

1.3

 

Standard Mode

 

1000

 

20 + 0.1Cb

ns

Fast Mode

300

Standard Mode

 

1000

 

20 + 0.1Cb

ns

Fast Mode

300

Standard Mode

 

300

 

20 + 0.1Cb

ns

Fast Mode

300

Standard Mode

 

300

 

20 + 0.1Cb

ns

Fast Mode

300

Standard Mode

4

μs

Fast Mode

0.6

 

Standard Mode

N/A

ns

Fast Mode

0

50

Standard Mode

 

400

Fast Mode

 

pF

 

400

Table 4-35. I2C Switching Characteristics(1)

NO.

16tc(SCL)

17tsu(SCLH-SDAL)

18th(SDAL-SCLL)

PARAMETER

 

MIN

MAX UNIT

Cycle time, I2Cx_SCL

Standard Mode

10

μs

Fast Mode

2.5

 

 

Setup time, I2Cx_SCL high before I2Cx_SDA

Standard Mode

4.7

μs

low

Fast Mode

0.6

 

Hold time, I2Cx_SCL low after I2Cx_SDA low

Standard Mode

4

μs

Fast Mode

0.6

 

 

(1)I2C must be configured correctly to meet the timings in Table 4-35.

Submit Documentation Feedback

Peripheral and Electrical Specifications

95

Page 95
Image 95
Texas Instruments TMS320C6726, TMS320C6727 warranty 15.3 I2C Electrical Data/Timing, Inter-Integrated Circuit I2C Timing