Texas Instruments TMS320C6727, TMS320C6726, TMS320C6722, UHPI Device-SpecificInformation

TMS320C6727, TMS320C6726, TMS320C6722

Floating-Point Digital Signal Processors

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SPRS268E –MAY 2005 –REVISED JANUARY 2007

4.12 Universal Host-Port Interface (UHPI) [C6727 Only]

4.12.1 UHPI Device-Specific Information

The C672x DSP includes a flexible universal host-port interface (UHPI) with more options than the host-port interface on the C671x DSP.

The UHPI on the C672x DSP supports three major operating modes listed in Table 4-9.

Table 4-9. UHPI Major Modes on C672x

UHPI MAJOR MODE	EXAMPLE FIGURE
Multiplexed Host Address/Data Half-Word (16-Bit) Mode	Figure 4-15
Multiplexed Host Address/Data Fullword (32-Bit) Mode	Figure 4-16
Non-Multiplexed Host Address/Data Fullword (32-Bit) Mode	Figure 4-17

In all modes, the UHPI uses three select inputs (UHPI_HCS, UHPI_HDS[2:1]) which are combined internally to produce the internal strobe signal HSTROBE. The HSTROBE strobe signal is used in the UHPI to capture incoming address and control signals on its falling edge and write data on its rising edge. The UHPI_HCS signal also gates the deassertion of the UHPI_HRDY signal externally.

UHPI_HDS[2] UHPI_HDS[1]

UHPI_HCS

UHPI_HRDY

Internal HSTROBE

Internal HRDY

Figure 4-14. UHPI Strobe and Ready Interaction

The two HPI control pins UHPI_HCNTL[1:0] determine the type of access that the host will perform. Note that only two of the four access types are supported in Non-Multiplexed Host Address/Data Fullword Mode.

Table 4-10. HPI Access Types Selected by UHPI_HCNTL[1:0]

		MULTIPLEXED	MULTIPLEXED	NON-
UHPI_HCNTL[1:0]	DESCRIPTION			MULTIPLEXED
		HALF-WORD	FULLWORD
				FULLWORD
00	HPI Control Register (HPIC) Access	Y	Y	Y
01	HPI Data Access (HPID) with autoincrementing address	Y	Y	N
10	HPI Address Register (HPIA) Access	Y	Y	N
11	HPI Data Access (HPID) without autoincrementing	Y	Y	Y
	address

CAUTION

When performing a set of HPID with autoincrementing address accesses (UHPI_HCNTL[1:0] = '01'),the set must begin and end at a word-aligned address. In addition, all four of the UHPI_HBE[3:0] must be enabled on every access in the set.

CAUTION

The encoding of UHPI_CNTL[1:0] on the C672x DSP is different from HCNTL[1:0] on the C671x DSP. Modes 01 and 10 are swapped.

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