Texas Instruments TMS320C6726 Xclkchk, Xevtctl, DITCSRA0, DITCSRA1, DITCSRA2, DITCSRA3, DITCSRA4

TMS320C6727, TMS320C6726, TMS320C6722

Floating-Point Digital Signal Processors

www.ti.com

SPRS268E –MAY 2005 –REVISED JANUARY 2007

Table 4-18. McASP Registers Accessed Through Peripheral Configuration Bus (continued)

McASP0		McASP1		McASP2		REGISTER
BYTE		BYTE		BYTE			DESCRIPTION
						NAME
ADDRESS		ADDRESS		ADDRESS
0x4400	00C8	0x4500	00C8	0x4600	00C8	XCLKCHK	Transmit clock check control register
0x4400 00CC		0x4500 00CC		0x4600 00CC		XEVTCTL	Transmitter DMA event control register
–		–		0x4600 0100		DITCSRA0	Left channel status register 0
–		–		0x4600 0104		DITCSRA1	Left channel status register 1
–		–		0x4600 0108		DITCSRA2	Left channel status register 2
–		–		0x4600	010C	DITCSRA3	Left channel status register 3
–		–		0x4600 0110		DITCSRA4	Left channel status register 4
–		–		0x4600 0114		DITCSRA5	Left channel status register 5
–		–		0x4600 0118		DITCSRB0	Right channel status register 0
–		–		0x4600	011C	DITCSRB1	Right channel status register 1
–		–		0x4600 0120		DITCSRB2	Right channel status register 2
–		–		0x4600 0124		DITCSRB3	Right channel status register 3
–		–		0x4600 0128		DITCSRB4	Right channel status register 4
–		–		0x4600	012C	DITCSRB5	Right channel status register 5
–		–		0x4600 0130		DITUDRA0	Left channel user data register 0
–		–		0x4600 0134		DITUDRA1	Left channel user data register 1
–		–		0x4600 0138		DITUDRA2	Left channel user data register 2
–		–		0x4600	013C	DITUDRA3	Left channel user data register 3
–		–		0x4600 0140		DITUDRA4	Left channel user data register 4
–		–		0x4600 0144		DITUDRA5	Left channel user data register 5
–		–		0x4600 0148		DITUDRB0	Right channel user data register 0
–		–		0x4600	014C	DITUDRB1	Right channel user data register 1
–		–		0x4600 0150		DITUDRB2	Right channel user data register 2
–		–		0x4600 0154		DITUDRB3	Right channel user data register 3
–		–		0x4600 0158		DITUDRB4	Right channel user data register 4
–		–		0x4600	015C	DITUDRB5	Right channel user data register 5
0x4400 0180		0x4500 0180		0x4600 0180		SRCTL0	Serializer control register 0
0x4400 0184		0x4500 0184		0x4600 0184		SRCTL1	Serializer control register 1
0x4400 0188		0x4500 0188		–		SRCTL2	Serializer control register 2
0x4400	018C	0x4500	018C	–		SRCTL3	Serializer control register 3
0x4400 0190		0x4500 0190		–		SRCTL4	Serializer control register 4
0x4400 0194		0x4500 0194		–		SRCTL5	Serializer control register 5
0x4400 0198		–		–		SRCTL6	Serializer control register 6
0x4400	019C	–		–		SRCTL7	Serializer control register 7
0x4400	01A0	–		–		SRCTL8	Serializer control register 8
0x4400	01A4	–		–		SRCTL9	Serializer control register 9
0x4400	01A8	–		–		SRCTL10	Serializer control register 10
0x4400 01AC		–		–		SRCTL11	Serializer control register 11
0x4400	01B0	–		–		SRCTL12	Serializer control register 12
0x4400	01B4	–		–		SRCTL13	Serializer control register 13
0x4400	01B8	–		–		SRCTL14	Serializer control register 14
0x4400 01BC		–		–		SRCTL15	Serializer control register 15
0x4400 0200		0x4500 0200		0x4600 0200		XBUF0(1)	Transmit buffer register for serializer 0
0x4400 0204		0x4500 0204		0x4600 0204		XBUF1(1)	Transmit buffer register for serializer 1
0x4400 0208		0x4500 0208		–		XBUF2(1)	Transmit buffer register for serializer 2

(1)Writes to XRBUF originate from peripheral configuration bus only when XBUSEL = 1 in XFMT.

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