Texas Instruments TMS320C6727, TMS320C6726, TMS320C6722, First Priority, Second Priority

TMS320C6727, TMS320C6726, TMS320C6722

Floating-Point Digital Signal Processors

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SPRS268E –MAY 2005 –REVISED JANUARY 2007

Table 3-5. Priority of Control of Data Output on Multiplexed Pins

PIN	FIRST PRIORITY	SECOND PRIORITY	THIRD PRIORITY
SPI0_SOMI/I2C0_SDA	SPI0_SOMI	I2C0_SDA
SPI0_CLK/I2C0_SCL	SPI0_CLK	I2C0_SCL
SPI0_SCS/I2C1_SCL	SPI0_SCS	I2C1_SCL
SPI0_ENA/I2C1_SDA	SPI0_ENA	I2C1_SDA
AXR0[5]/SPI1_SCS	AXR0[5]	SPI1_SCS
AXR0[6]/SPI1_ENA	AXR0[6]	SPI1_ENA
AXR0[7]/SPI1_CLK	AXR0[7]	SPI1_CLK
AXR0[8]/AXR1[5]/SPI1_SOMI	AXR0[8]	AXR1[5]	SPI1_SOMI
AXR0[9]/AXR1[4]/SPI1_SIMO	AXR0[9]	AXR1[4]	SPI1_SIMO
AXR0[10]/AXR1[3]	AXR0[10]	AXR1[3]
AXR0[11]/AXR1[2]	AXR0[11]	AXR1[2]
AXR0[12]/AXR1[1]	AXR0[12]	AXR1[1]
AXR0[13]/AXR1[0]	AXR0[13]	AXR1[0]
AXR0[14]/AXR2[1]	AXR0[14]	AXR2[1]
AXR0[15]/AXR2[0]	AXR0[15]	AXR2[0]
AHCLKR0/AHCLKR1	AHCLKR0	AHCLKR1
AHCLKX0/AHCLKX2	AHCLKX0	AHCLKX2
AMUTE2/HINT	AMUTE2	HINT
HD[16]/HHWIL	HD[16]	HHWIL
EM_D[31:16]/UHPI_HA[15:0](1)	EM_D[31:16] (Disabled if	UHPI_HA[15:0] (Input Only)
	CFGHPI.NMUX=1)

(1)When using the UHPI in non-multiplexed mode, ensure EM_D[31:16] are configured as inputs so that these pins may be used as UHPI_HA[15:0]. To ensure this, you must set the CFGHPI.NMUX bit to a '1'before the EMIF SDRAM initialization completes; otherwise, a drive conflict will occur. [The EMIF bus parking function drives the data bus in between accesses.]

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