Texas Instruments warranty TMS320C6727, TMS320C6726, TMS320C6722, 30.McASP Output Timings

TMS320C6727, TMS320C6726, TMS320C6722

Floating-Point Digital Signal Processors

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SPRS268E –MAY 2005 –REVISED JANUARY 2007

10

9 10

AHCLKR/X (Falling Edge Polarity)

AHCLKR/X (Rising Edge Polarity)

11

12

12

ACLKR/X (CLKRP = CLKXP = 1)(A)

ACLKR/X (CLKRP = CLKXP = 0)(B)

	13	13
13		13

AFSR/X (Bit Width, 0 Bit Delay)

AFSR/X (Bit Width, 1 Bit Delay)

AFSR/X (Bit Width, 2 Bit Delay)

13 13 13

AFSR/X (Slot Width, 0 Bit Delay)

AFSR/X (Slot Width, 1 Bit Delay)

AFSR/X (Slot Width, 2 Bit Delay)								14
									15
AXR[n] (Data Out/Transmit)
A0	A1	A30 A31	B0	B1	B30 B31 C0	C1	C2	C3	C31

A.For CLKRP = CLKXP = 1, the McASP transmitter is configured for falling edge (to shift data out) and the McASP receiver is configured for rising edge (to shift data in).

B.For CLKRP = CLKXP = 0, the McASP transmitter is configured for rising edge (to shift data out) and the McASP receiver is configured for falling edge (to shift data in).

Figure 4-30. McASP Output Timings

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