Texas Instruments TMS320C6726 warranty McASP Switching Characteristics1, Parameter MIN MAX Unit

TMS320C6727, TMS320C6726, TMS320C6722

Floating-Point Digital Signal Processors

www.ti.com

SPRS268E –MAY 2005 –REVISED JANUARY 2007

Table 4-23. McASP Switching Characteristics(1)

NO.

9tc(AHCKRX)

10tw(AHCKRX)

11tc(ACKRX)

12tw(ACKRX)

13td(ACKRX-FRX)

14td(ACLKX-AXRV)

15tdis(ACKX-AXRHZ)

PARAMETER	MIN	MAX	UNIT
Cycle time, AHCLKR internal, AHCLKR output	20
Cycle time, AHCLKR external, AHCLKR output	20		ns
Cycle time, AHCLKX internal, AHCLKX output	20
Cycle time, AHCLKX external, AHCLKX output	20
Pulse duration, AHCLKR internal, AHCLKR output	(AHR/2) – 2.5(2)
Pulse duration, AHCLKR external, AHCLKR output	(AHR/2) – 2.5(2)		ns
Pulse duration, AHCLKX internal, AHCLKX output	(AHX/2) – 2.5(3)
Pulse duration, AHCLKX external, AHCLKX output	(AHX/2) – 2.5(3)
Cycle time, ACLKR internal, ACLKR output	greater of 2P or 20 ns(4)
Cycle time, ACLKR external, ACLKR output	greater of 2P or 20 ns(4)		ns
Cycle time, ACLKX internal, ACLKX output	greater of 2P or 20 ns(4)
Cycle time, ACLKX external, ACLKX output	greater of 2P or 20 ns(4)
Pulse duration, ACLKR internal, ACLKR output	(AR/2) – 2.5(5)
Pulse duration, ACLKR external, ACLKR output	(AR/2) – 2.5(5)		ns
Pulse duration, ACLKX internal, ACLKX output	(AX/2) – 2.5(6)
Pulse duration, ACLKX external, ACLKX output	(AX/2) – 2.5(6)
Delay time, ACLKR internal, AFSR output		5
Delay time, ACLKX internal, AFSX output		5
Delay time, ACLKR external input, AFSR output		10
Delay time, ACLKX external input, AFSX output		10
Delay time, ACLKR external output, AFSR output		10
Delay time, ACLKX external output, AFSX output		10	ns
Delay time, ACLKR internal, AFSR output	–1
Delay time, ACLKX internal, AFSX output	–1
Delay time, ACLKR external input, AFSR output	0
Delay time, ACLKX external input, AFSX output	0
Delay time, ACLKR external output, AFSR output	0
Delay time, ACLKX external output, AFSX output	0
Delay time, ACLKX internal, AXRn output	–1	5
Delay time, ACLKX external input, AXRn output	0	10	ns
Delay time, ACLKX external output, AXRn output	0	10
Disable time, ACLKX internal, AXRn output	–3	10
Disable time, ACLKX external input, AXRn output	–3	10	ns
Disable time, ACLKX external output, AXRn output	–3	10

(1)ACLKX internal – ACLKXCTL.CLKXM = 1, PDIR.ACLKX = 1 ACLKX external input – ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 0 ACLKX external output – ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 1 ACLKR internal – ACLKRCTL.CLKRM = 1, PDIR.ACLKR =1 ACLKR external input – ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 0 ACLKR external output – ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 1

(2)AHR - Cycle time, AHCLKR.

(3)AHX - Cycle time, AHCLKX.

(4)P = SYSCLK2 period

(5)AR - ACLKR period.

(6)AX - ACLKX period.

Submit Documentation Feedback Peripheral and Electrical Specifications 77