
Status Registers
Overview
CURRent This shows whether the present current level is over or under the specified trip limit.
| CURRent |
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| Bit | Bit Weight | Bit Name | Description |
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0 | 1 | Over CURrent | Set if the supply’s output current is | |
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| greater than the |
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| and the supply is in Operation state. |
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1 | 2 | Under CURrent | Set if the supply’s output current is less | |
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| than the |
trip level (variable trip limit) and the supply is in Operation state.
Standard The standard event status register sets bits for specific events during power supply Event Status operation. All bits in the standard event status registers are set through the error event
Register queue. The register is defined by 488.2 and is controlled using 488.2 common commands, *ESE, *ESE?, and *ESR?.
Figure 4.3 summarizes the standard Event Status Register
Operation Complete | 0 |
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Not Used | 1 |
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Query Error | 2 |
| Not Used | 0 | |
Device Dependent Error | 3 |
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| Not Used | 1 | |||
Execution Error | 4 |
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| Not Used | 2 | |||
Command Error | 5 |
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| Summary of QUESTionable Status | 3 | |||
User Request | 6 |
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| MAV | 4 | |||
Power On | 7 | + | |||
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Reserved | 8 | RQS/MSS | |||
| 6 | ||||
Reserved | 9 |
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| Summary of OPERation Status | 7 | |||
Reserved | 10 |
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Reserved | 11 |
| Status Byte |
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Reserved | 12 |
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Reserved | 13 |
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Reserved | 14 |
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Reserved | 15 |
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Standard Event Status Register |
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Figure 4.3 IEEE 488.2 Status Register and Status Byte |
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Release 2.1 | 77 |