Agilent Technologies 33120A manual Earth-Referenced Logic, Power Supplies

Chapter 5 Theory of Operation

Earth-Referenced Logic

The main CPU, U102, communicates with the earth referenced logic through an optically isolated asynchronous serial data link. U101 isolates the incoming data (OG_RXD*) from the earth referenced logic. Similarly, U901 isolates the data from U102 (OG_TXD) to the earth reference logic. Data is sent in an 11-bit frame at a rate of 187.5 k bits/second. When the RS-232 interface is selected, data is sent across the serial link at 93.75 k bits/second. The 11-bit internal data frame is configured for one start bit, eight data bits, one control bit, and one stop bit.

Earth-Referenced Logic

Block 9 on block diagram page 129; Schematic on page 139.

The earth referenced section provides all rear panel input/output capability. Microprocessor U903 handles GPIB (IEEE-488) control through bus interface chip U904 and bus receiver/driver chips U907 and U908. The RS-232 interface is also controlled through U903. RS-232 transceiver chip U906 provides the required level shifting to approximate

–9 volt logic levels through on-chip charge-pump power supplies using capacitors C904 and C906. Communication between the earth referenced logic interface circuits and the floating logic is accomplished through an optically-isolated bi-directional serial interface. Isolator U101 couples data from U903 to microprocessor U102. Isolator U901 couples data from U102 to microprocessor U903.

Power Supplies

Block 10 on block diagram page 129; Schematic on page 140.

The power supply section, is divided into two isolated blocks similar to the floating logic and earth referenced logic sections discussed earlier. The floating supply outputs are – 18 Vdc, +5 Vdc, -5.2 Vdc (VEE), and a

6 Vrms center tapped filament supply for the vacuum fluorescent display. All earth referenced logic is powered from a single +5 Vdc supply. Power-on reset signals are provided by both the floating and earth referenced power supplies. In addition, the floating section +5 Vdc supply incorporates a power failure detection circuit which provides a priority interrupt signal to the main CPU (U102).

98