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| Issue: | 3.4 |
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| User Manual |
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| Date: | 11th July 2008 |
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| Port control/status registers |
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| Group adaptive routing table registers |
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256 | (0x0000 | 0100) |
| Network discovery register |
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257 | (0x0000 | 0101) |
| Router identity register |
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258 | (0x0000 | 0102) |
| Router control register |
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259 | (0x0000 | 0103) |
| Error active register |
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260 | (0x0000 | 0104) |
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261 | (0x0000 | 0105) |
| Device Manufacturer and Chip ID register |
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262 | (0x0000 | 0106) |
| General Purpose register |
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263 | (0x0000 | 0107) |
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264 | (0x0000 | 0108) |
| Clock Control register |
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265 | (0x0000 | 0109) |
| Destination Key Register |
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9.3 GROUP ADAPTIVE ROUTING TABLE REGISTERS
The Group Adaptive Routing (GAR) table is accessed through configuration memory addresses 32- 255 (0x0000
The fields in the GAR registers are illustrated in Figure
31 | 30 | 29 | 28 | 11 | 10 | 1 | 0 |
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RESERVED
REQUEST
NOT USED
DEL_HEAD
PRIORITY
INVALID_ADDR
Figure 9-2 GAR Register Fields
The GAR table holds the routing table information that maps logical addresses to one or more port addresses. There is one entry (register) in the GAR table for each possible logical address. The
Preliminary | 105 |