Atmel SpW-10X user manual SpaceWire Router, User Manual, Preliminary

SpW-10X	Ref.:	UoD_SpW-10X_
SpaceWire Router		UserManual
	Issue:	3.4
User Manual
	Date:	11th July 2008

configuration memory address range of the GAR table is 32-255 (0x0000 0020 – 0x0000 00FF). The configuration memory address corresponds to the logical address; hence the GAR table entry at address 39 corresponds to logical address 39.

The logical address to port mapping is held in the REQUEST field. Each bit in this field represents a physical output port; thus up to 28 possible output ports can be specified using the GAR register, although only 10 ports (plus the configuration port) are provided in the SpW-10X. The configuration port is port number 0, the SpaceWire ports are port numbers 1 to 8 and the External ports are ports 9 and 10. When a bit is set in the REQUEST field packets may be routed to the corresponding output ports. The port number corresponds to the bit position in the GAR register. For example, if configuration memory address 39 has bit 2 set then a packet with logical address 39 may be routed out of port 2. If bits 2 and 4 are both set then the packet may be routed out of either port 2 or 4. Port 0, the configuration port, is a special port which can only be accessed using address 0 so this bit position in the GAR table registers is reserved and will always be set to zero.

The DEL_HEAD bit, when set, causes the leading byte (header) of a packer to be deleted.

The PRIORITY bit determines the priority of the logical address when packets waiting at two input ports wish to use the same output port (1 = high priority, 0 = low priority).

The INVALID_ADDR bit is set to indicate that the corresponding logical address is not valid.

Table 9-3 describes each field in the GAR register.

Preliminary 106