Latency and Jitter, Clock Periods, Router Latency | Atmel SpW-10X

	SpW-10X	Ref.:	UoD_SpW-10X_
	SpaceWire Router		UserManual
	SpaceWire Router	Issue:	3.4
	User Manual	Issue:	3.4
	User Manual	Date:	11th July 2008

10.6 LATENCY AND JITTER

The timing parameters for the data and time-code latency and the time-code jitter are derived from the receive clock, transmit clock and system clock period. The worst case number of clock cycles required is used in each equation.

In the SpaceWire router the system clock is a known frequency and the transmitter and receiver frequency are derived from the input and output bit rates. The clock frequencies are defined as follows.

Note: All figures are worst case. Due to the uncertainty of synchronisation between clock domains the measured time may be less than indicated.

In the following sections the clock periods are defined and the latency and jitter timing parameter definitions are detailed.

10.6.1 Clock Periods

System Clock Period

TSYSPERIOD = 33.333 ns (Clock Frequency = 30 MHz)

Transmit Clock Period

TTXPERIOD = Transmit bit rate period * 2 (Where Transmit bit rate period is the output bit rate selected by the user configuration)

Receive Clock Period

TRXPERIOD = Receive bit rate period * 2 (Where Receive bit rate period is the period of the input bit rate)

10.6.2 Switching Latency

Switching latency is the time it takes the router to connect a waiting input port to an output port that has just finished sending a packet. It includes any time for group adaptive routing and arbitration of two or more input ports competing for the same output port.

Switching latency for the router is defined as follows

TSWITCH = 4⋅TSYSPERIOD

10.6.3 Router Latency

Router latency is the time taken for a character in a packet to pass through the router assuming that the packet has already been switched to an output port and that there is no blocking of the output port. Router latency for the SpaceWire router is defined for port to port data transfer operations as follows:

Preliminary

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Atmel SpW-10X user manual Latency and Jitter, Clock Periods, Switching Latency, Router Latency

Contents

UoDSpW-10X Issue Date Th JulyUserManual Ref. UoDSpW-10X Date Issue Comments Author11th July SpW-10X Contents Control Logic and Operational Modes 103 Global Spacewire Link Control 136 128138 150 143151 15.16 List of Figures 100 List of Tables Able 9-7 E Xternal P ORT C ONTROL/S Tatus F Ields TERMS, Acronyms and Abbreviations Introduction Ref. UoDSpW-10X UserManual DocumentsDate 11th July Applicable Documents Document Number Document Title STAND-ALONE Router User Applications Embedded Router Node Interface Expanding the Number of Router Ports Issue Date 11th July Expanding the number of SpaceWire Ports SpW-10X Functional Overview External Ports Spacewire Ports Routing Table Configuration PortRouting Control Logic and Crossbar CONTROL/STATUS Registers TIME-CODE Processing PIN Locations Pin Signal Type Description VSSA2 GND PFOLVDS33Z EXTOUTDATA90 PO44F EXTOUTDATA108 PO44F EXTTIMEOUT6 PO44F Device Interface Global Signals SpW-10X SpaceWire Signals Spacewire SignalsTestIOEn TestEn DOUTPlus2 DOUTMinus1DOUTMinus2 DOUTPlus3 DINMinus1 11th July DINPlus1DINPlus2 DINMinus2 Lvds Receiver Fail-Safe Resistors SpaceWire Input Fail Safe Resistors SpW-10X UserManual Issue Date 11th July External Port Data SignalsExternal Port Interface Signals PinNo Dir Description Type EXT9INDATA5 Time-Code Signals PinNo Dir Description Type TIME-CODE SignalsSelexttime and the EXTTIMEIN70 EXTTIMEIN70 input Exttickin the value on EXTTIMEIN70 isExttickout is asserted Link error indication Signals PinNo Dir Description Type Status Interface SignalsPower on Configuration Normal Operation Configuration interface timing specification Reset Configuration Signals Feedbdiv at reset 11th July Reset Configuration Signals Dir DescriptionMaps to PORTXRATE20 Maps to Porstartonreqn General POWER, GROUND, PLL and Lvds SignalsDecoupling Lvds Reference PLL with external components External Port Interface Operation Interface Operations TIME-CODE Interface Operation External port read timing specification Time-Code Output Interface Status Interface Operation Status Output Bits Reset configuration interface timing specification Reset Configuration Interface Operation Packet Addresses Spacewire Router Packet Types Packet Header Deletion Packet PriorityPacket Priority Mapping Packet Address Physical Port type Invalid Addresses Supported Commands Command PacketsData Packets Read Command Read Single Address Command Format Issue Date Th July Read Single Address Characteristics SpW-10X EOP Read Incrementing Command Issue Date Th July Read Incrementing Address Characteristics Data Length MS 11th July 00h 11 Read-Modify-Write Command Characteristics Read Modify Write Command Preliminary66 RMW Read-Modify-Write example operation FEh 00h 14 Write Command Characteristics Write Command FEh 01h CRC MSB Status Command Error ResponseCode SpW-10X Local Source Path Address Command Packet Cyclic Redundancy Check Source Path Address Field Date 11 th July Command Packet Fill Bytes Default operating mode Spacewire Link ControlControl Logic and Operational Modes Auto-Start Automatic deactivate driver mode Link-Disable Deactivate driver operating mode Txrate +1 Setting the SpaceWire port transmit data rate TX 10MbitDIV +1 Setting SpaceWire Transmit Data Rate Global Spacewire Link Control Disable on Silence mode Start on request modeCfgstartonreq bit Control Logic and Routing Packet address errorArbitration Arbitration of packets with matching priority Arbitration of three packets with matching priority Arbitration of packets with different priority SpW-10X SpW-10X 10 Normal group adaptive routing Group Adaptive Routing Loop-back with Self-Addressing 11 Group adaptive routing when other ports busy 13 Packet Self-Addressing mode Blocked destination Packet Blocking 14 Destination Node Blocked a Blocking Allowed Mode 16 Destination Node Blocked c Watchdog timer mode Blocking Allowed 19 Destination Node Blocked Watchdog Mode c 21 Source Node Stalled a 100 101 102 Internal Memory MAP Register Definitions Register Addresses Summary Group Adaptive Routing Table Registers 11th July Configuration Register Addresses 106 Bits Name Reset Description Read/Write Value Issue Date Th July GAR Table Register Description Port CONTROL/STATUS Registers Configuration Port Control/Status Register FieldsGeneric port control/status register fields 11th July Bits Name Reset Description Read/Write Value Configuration port control/status register fields 110 111 SpaceWire Port Control/Status Register Fields SpaceWire port control/status register bits 113 114 Router CONTROL/STATUS Registers External port control/status register bitsNetwork Discovery Register Router Identity Register Router Control Register Fields Router Control Register 118 119 Error Active Register Fields Error active Register Time-Code Register Fields Time-Code Register Device Manufacturer and Chip ID Register General Purpose Register Time-Code Enable Register Transmit Clock Control Register 125 126 Unused Registers and Register Bits Destination Key RegisterEmpty packets Writing to a READ-ONLY Register Clock and Reset Timing Parameters Switching CharacteristicsSerial Signals Timing Parameters External port input Fifo timing parameters External Port Timing Parameters TIME-CODE Interface Timing Parameters Time-code Timectrrst interface ERROR/STATUS Interface Timing Parameters 132 Latency and Jitter Switching LatencyClock Periods Router Latency SpaceWire port to External port Issue Date Th July SpaceWire port to SpaceWire portExternal port to SpaceWire port Time-code Latency 10.6.6 200M bits/s Input and Output Bit Rate Example Time-code Jitter DC Characteristics Electrical CharacteristicsOperating Conditions Symbol Description Value Units Absolute Maximum Ratings Absolute Maximum Ratings Symbol Description Value UnitsReliability Information Reliabilty Information Application Guidelines Example Circuit Diagram 139 PCB Design and Layout Guidelines External Ports Status / Power On Configuration InterfaceTime-code Interface PLL Layout Recommendations 12.2.10 PLL Anomalies Anomalies and Warnings 144 Data Strobe Reset Waveform Reset Anomaly 146 Reset Anomaly Workarounds Data Strobe Disable Waveform Parity Error Action Parity Error AnomalyParity Error Anomaly No error end of packet inserted after parity error Parity Error Workaround Technical Support Issue 3.2 to Issue Issue 3.3 to IssueIssue 3.1 to Issue Document Changes Issue 2.5 to Issue Issue 3.0 to Issue Issue 2.3 to Issue Issue 2.4 to IssueIssue 2.2 to Issue Issue 2.0 to Issue Issue 2.1 to IssueIssue 1.7 to Issue Issue 1.6 to Issue Issue 1.0 to Issue Issue 1.1 to Issue