Atmel SpW-10X user manual Register Definitions, Internal Memory Map, SpaceWire Router, User Manual

SpW-10X	Ref.:	UoD_SpW-10X_
SpaceWire Router		UserManual
	Issue:	3.4
User Manual
	Date:	11th July 2008

9. REGISTER DEFINITIONS

This section describes the internal configuration registers of the SpW-10X Router.

The following subsections contain register bit description tables which hold the following information:

•The bit numbers of each field

•A descriptive name for each field

•The reset value for each field

•A description of what the each field in the register is used for

•An indication of whether the field is readable and/or writeable by a configuration command.

The internal register size is 32 bits unless otherwise specified in the register description. There are 263 registers in the configuration port addresses. Registers that are shorter than 32-bits or that have unused fields will return zero in all the unused bit positions when read. The unused bit positions are ignored during writing but should in any case be set to zero.

9.1 INTERNAL MEMORY MAP

The memory map for the SpaceWire Router is shown in Figure 9-1.

255

32

31

0

GROUP ADAPTIVE ROUTING TABLE REGISTERS

PORT

CONTROL/STATUS

REGISTERS

Address bit-8 = 0

255

0

ROUTER

CONTROL/STATUS

REGISTERS

Address bit-8 = 1

Figure 9-1 Router Internal Memory Map

The Group Adaptive Routing (GAR) registers map SpaceWire logical addresses 32-255 to the physical ports – SpaceWire ports or External ports. The link control/status registers are used to configure the ports and router functions and to report status information. The router control/status

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