Node Interface, Embedded Router | Atmel SpW-10X specification

	SpW-10X	Ref.:	UoD_SpW-10X_
	SpaceWire Router		UserManual
	SpaceWire Router	Issue:	3.4
	User Manual	Issue:	3.4
	User Manual	Date:	11th July 2008

2.2 NODE INTERFACE

The SpaceWire Router has two external ports which enable the device to be used as a node interface. The equipment to be connected to the SpaceWire network is attached to one or both external ports. One or more SpaceWire ports are used to provide the connection into the SpaceWire network. Unused SpaceWire ports may be disabled and their outputs deactivated to save power. In this arrangement configuration of the routing tables and other parameters may be done by sending configuration packets from the local host via an external port or from a remote network manager via a SpaceWire port.

Active

SpaceWire

Links

		SpW‐10X	User FPGA
		SpW‐10X	or
	Disabled	Router	or
	Disabled	Router	Processor
	SpaceWire		Processor
	SpaceWire
	Links

SpaceWire Node

Figure 2-2 Node Interface

In Figure 2-2 a SpW-10X router is used as an interface to a user FPGA or processor, which may be part of a SpaceWire enabled instrument, control processor or other sub-system. The interface to the user FPGA or processor is via the external FIFO ports of the SpW-10X router. Only three SpaceWire links are needed for this SpaceWire node so the other five links are disabled to save power.

2.3 EMBEDDED ROUTER

The SpaceWire Router device can also be used to provide a node with an embedded router. In this case the external ports are used to provide the local connections to the node and the SpaceWire ports are used to make connections to other ports in the network. The difference between this configuration and that of section 2.2 is just a conceptual one with the Node interface configuration normally using fewer SpaceWire ports than the Embedded Router configuration.

Preliminary

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Image 17

Atmel SpW-10X user manual Node Interface, Embedded Router

Contents

UserManual Issue Date Th JulyUoDSpW-10X 11th July Date Issue Comments AuthorRef. UoDSpW-10X SpW-10X Contents Control Logic and Operational Modes 103 Global Spacewire Link Control 138 128136 151 143150 15.16 List of Figures 100 List of Tables Able 9-7 E Xternal P ORT C ONTROL/S Tatus F Ields TERMS, Acronyms and Abbreviations Introduction Ref. UoDSpW-10X UserManual DocumentsDate 11th July Applicable Documents Document Number Document Title STAND-ALONE Router User Applications Embedded Router Node Interface Expanding the Number of Router Ports Issue Date 11th July Expanding the number of SpaceWire Ports SpW-10X Functional Overview External Ports Spacewire Ports Routing Control Logic and Crossbar Configuration PortRouting Table CONTROL/STATUS Registers TIME-CODE Processing PIN Locations Pin Signal Type Description VSSA2 GND PFOLVDS33Z EXTOUTDATA90 PO44F EXTOUTDATA108 PO44F EXTTIMEOUT6 PO44F Device Interface Global Signals SpW-10X SpaceWire Signals Spacewire SignalsTestIOEn TestEn DOUTPlus2 DOUTMinus1DOUTMinus2 DOUTPlus3 DINMinus1 11th July DINPlus1DINPlus2 DINMinus2 Lvds Receiver Fail-Safe Resistors SpaceWire Input Fail Safe Resistors SpW-10X External Port Interface Signals PinNo Dir Description Type External Port Data SignalsUserManual Issue Date 11th July EXT9INDATA5 Selexttime and the EXTTIMEIN70 TIME-CODE SignalsTime-Code Signals PinNo Dir Description Type Exttickout is asserted Exttickin the value on EXTTIMEIN70 isEXTTIMEIN70 input Link error indication Signals PinNo Dir Description Type Status Interface SignalsPower on Configuration Normal Operation Configuration interface timing specification Reset Configuration Signals Feedbdiv at reset 11th July Reset Configuration Signals Dir DescriptionMaps to PORTXRATE20 Maps to Porstartonreqn General POWER, GROUND, PLL and Lvds SignalsDecoupling Lvds Reference PLL with external components External Port Interface Operation Interface Operations TIME-CODE Interface Operation External port read timing specification Time-Code Output Interface Status Interface Operation Status Output Bits Reset configuration interface timing specification Reset Configuration Interface Operation Packet Addresses Spacewire Router Packet Types Packet Priority Mapping Packet Address Physical Port type Packet PriorityPacket Header Deletion Invalid Addresses Data Packets Command PacketsSupported Commands Read Command Read Single Address Command Format Issue Date Th July Read Single Address Characteristics SpW-10X EOP Read Incrementing Command Issue Date Th July Read Incrementing Address Characteristics Data Length MS 11th July 00h 11 Read-Modify-Write Command Characteristics Read Modify Write Command Preliminary66 RMW Read-Modify-Write example operation FEh 00h 14 Write Command Characteristics Write Command FEh 01h CRC MSB Code Command Error ResponseStatus SpW-10X Local Source Path Address Command Packet Cyclic Redundancy Check Source Path Address Field Date 11 th July Command Packet Fill Bytes Default operating mode Spacewire Link ControlControl Logic and Operational Modes Auto-Start Automatic deactivate driver mode Link-Disable Deactivate driver operating mode Txrate +1 Setting the SpaceWire port transmit data rate TX 10MbitDIV +1 Setting SpaceWire Transmit Data Rate Global Spacewire Link Control Cfgstartonreq bit Start on request modeDisable on Silence mode Arbitration Packet address errorControl Logic and Routing Arbitration of packets with matching priority Arbitration of three packets with matching priority Arbitration of packets with different priority SpW-10X SpW-10X 10 Normal group adaptive routing Group Adaptive Routing Loop-back with Self-Addressing 11 Group adaptive routing when other ports busy 13 Packet Self-Addressing mode Blocked destination Packet Blocking 14 Destination Node Blocked a Blocking Allowed Mode 16 Destination Node Blocked c Watchdog timer mode Blocking Allowed 19 Destination Node Blocked Watchdog Mode c 21 Source Node Stalled a 100 101 102 Internal Memory MAP Register Definitions Register Addresses Summary Group Adaptive Routing Table Registers 11th July Configuration Register Addresses 106 Bits Name Reset Description Read/Write Value Issue Date Th July GAR Table Register Description Generic port control/status register fields Configuration Port Control/Status Register FieldsPort CONTROL/STATUS Registers 11th July Bits Name Reset Description Read/Write Value Configuration port control/status register fields 110 111 SpaceWire Port Control/Status Register Fields SpaceWire port control/status register bits 113 114 Network Discovery Register External port control/status register bitsRouter CONTROL/STATUS Registers Router Identity Register Router Control Register Fields Router Control Register 118 119 Error Active Register Fields Error active Register Time-Code Register Fields Time-Code Register Device Manufacturer and Chip ID Register General Purpose Register Time-Code Enable Register Transmit Clock Control Register 125 126 Unused Registers and Register Bits Destination Key RegisterEmpty packets Writing to a READ-ONLY Register Serial Signals Timing Parameters Switching CharacteristicsClock and Reset Timing Parameters External port input Fifo timing parameters External Port Timing Parameters TIME-CODE Interface Timing Parameters Time-code Timectrrst interface ERROR/STATUS Interface Timing Parameters 132 Latency and Jitter Switching LatencyClock Periods Router Latency SpaceWire port to External port Issue Date Th July SpaceWire port to SpaceWire portExternal port to SpaceWire port Time-code Latency 10.6.6 200M bits/s Input and Output Bit Rate Example Time-code Jitter Operating Conditions Symbol Description Value Units Electrical CharacteristicsDC Characteristics Absolute Maximum Ratings Absolute Maximum Ratings Symbol Description Value UnitsReliability Information Reliabilty Information Application Guidelines Example Circuit Diagram 139 PCB Design and Layout Guidelines Time-code Interface Status / Power On Configuration InterfaceExternal Ports PLL Layout Recommendations 12.2.10 PLL Anomalies Anomalies and Warnings 144 Data Strobe Reset Waveform Reset Anomaly 146 Reset Anomaly Workarounds Data Strobe Disable Waveform Parity Error Anomaly Parity Error AnomalyParity Error Action No error end of packet inserted after parity error Parity Error Workaround Technical Support Issue 3.2 to Issue Issue 3.3 to IssueIssue 3.1 to Issue Document Changes Issue 2.5 to Issue Issue 3.0 to Issue Issue 2.2 to Issue Issue 2.4 to IssueIssue 2.3 to Issue Issue 2.0 to Issue Issue 2.1 to IssueIssue 1.7 to Issue Issue 1.6 to Issue Issue 1.0 to Issue Issue 1.1 to Issue