SpW-10X

Ref.:

UoD_SpW-10X_

 

 

 

 

 

SpaceWire Router

 

UserManual

 

 

 

 

 

Issue:

3.4

 

 

 

 

 

 

User Manual

 

 

 

 

 

 

Date:

11th July 2008

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 9-5 Configuration Port Control/Status Register Fields

 

 

 

 

 

 

 

 

 

 

 

Bits

Name

Reset

Description

 

 

Read/Write

 

 

 

 

Value

 

 

 

 

 

 

 

 

 

 

 

0

Error active

‘0’

The error active bit is set when one of the error

R

 

 

 

 

 

bits is active

 

 

 

 

 

 

 

 

 

 

1

Port timeout error

‘0’

The port timeout error bit is set when a timeout

R

 

 

 

 

 

event is detected by the configuration port

 

 

 

 

 

 

 

routing logic.

 

 

 

 

 

 

 

 

 

 

2

Invalid Header

‘0’

The Invalid header CRC bit is set when the

R

 

 

 

CRC

 

header CRC is invalid.

 

 

 

 

 

 

 

 

 

 

3

Invalid Data CRC

‘0’

The invalid data CRC is set when the data part

R

 

 

 

 

 

of the packet is corrupted and the CRC does

 

 

 

 

 

 

not match the internally generated CRC.

 

 

 

 

 

 

 

 

 

4

Invalid Destination

‘0’

The invalid destination key bit is set when the

R

 

 

 

Key

 

destination key in the command packet is

 

 

 

 

 

 

 

invalid.

 

 

 

 

 

 

 

 

 

 

5

Command not

‘0’

The command not implemented bit is set when

R

 

 

 

implemented

 

the command code is a valid RMAP code but

 

 

 

 

 

 

the command is not supported by the

 

 

 

 

 

 

 

SpaceWire Router.

 

 

 

 

 

 

 

 

 

 

6

Invalid Data Length

‘0’

The invalid data length bit is set when a data

R

 

 

 

 

 

length error is detected

 

 

 

 

 

 

 

 

 

 

7

Invalid RMW Data

‘0’

The read modify write command data length is

R

 

 

 

Length

 

invalid. When a read modify write is performed

 

 

 

 

 

 

the expected data length is 8.

 

 

 

 

 

 

 

 

 

 

8

Invalid Destination

‘0’

The invalid destination logical address bit is set

R

 

 

 

Logical Address

 

when the destination logical address in the

 

 

 

 

 

 

 

command packet is not the default value of

 

 

 

 

 

 

254.

 

 

 

 

 

 

 

 

 

 

9

Early EOP

‘0’

The early EOP bit is set when the command

R

 

 

 

 

 

packet is terminated before the end of packet

 

 

 

 

 

 

with an EOP

 

 

 

 

 

 

 

 

 

 

10

Late EOP

‘0’

The late EOP bit is set when the command

R

 

 

 

 

 

packet is not terminated correctly and trailing

 

 

 

 

 

 

bytes are detected before the end of packet.

 

 

 

 

 

 

 

 

11

Early EEP

‘0’

The early EEP bit is set when the command

R

 

 

 

 

 

packet is terminated before the end of packet

 

 

 

 

 

 

with an EEP

 

 

 

 

 

 

 

 

 

 

 

12

Late EEP

‘0’

The late EEP bit is set when the command

 

R

 

 

 

 

 

packet is not terminated correctly and trailing

 

 

 

 

 

 

bytes are detected before the end of packet.

 

 

 

 

 

 

 

 

13

Verify Buffer

‘0’

The verify buffer overrun error bit is set when a

R

 

 

 

Overrun Error

 

verified write command is performed and the

 

 

 

 

 

 

data length is not 4.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Preliminary

 

 

110

 

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Image 110
Atmel SpW-10X user manual 110