Atmel SpW-10X Reset Configuration Signals, Configuration interface timing specification

SpW-10X	Ref.:	UoD_SpW-10X_
SpaceWire Router		UserManual
	Issue:	3.4
User Manual
	Date:	11th July 2008

1	2	3	4	5	6	7	8
CLK
RST
STAT_MUX_OUT		POR_SIGNALS					STAT_MUX_OUT
			Inputs				Outputs

Figure 5-2 Configuration interface timing specification

The POR configuration signals (POR_SIGNALS) listed in Table 5-6 are loaded into the appropriate internal configuration registers of the router after RST is de-asserted. To make sure that the POR configuration signal values are loaded properly they should be held stable for at least three CLK cycles following RST being de-asserted. The status output STAT_MUX_OUT is driven on the fourth CLK cycle after RST is de-asserted.

See section 6.3 for information on the operation of the status/power on configuration interface and section 10.5 for timing details.

5.6 RESET CONFIGURATION SIGNALS

The Reset Configuration signals are listed in Table 5-6. These signals are input on STAT_MUX_OUT after reset to initialise the router. They are not used at any other time except immediately after reset. The Reset Configuration signals set relevant bits in the configuration registers (see section 9). Following reset the values of these signals are synchronously loaded into the router. The timing of the Reset Configuration signals is illustrated in Figure 6-7.

Preliminary 42