Status Interface Operation | Atmel SpW-10X guide

	SpW-10X	Ref.:	UoD_SpW-10X_
	SpaceWire Router		UserManual
	SpaceWire Router	Issue:	3.4
	User Manual	Issue:	3.4
	User Manual	Date:	11th July 2008

SEL_EXT_TIME signal when EXT_TICK_IN signal has a rising edge. If SEL_EXT_TIME is 1 then the EXT_TIME_IN(7:0) inputs are used to provide the contents of the time-code. If SEL_EXT_TIME is 0 then the internal time-code counter provides the least-significant 6-bits of the time-code and the EXT_TIME_IN(7:6) inputs provide the most-significant 2-bits. When using the EXT_TIME_IN(7:0) inputs to provide the complete time-code, the time-code is only broadcast if it is a valid time-code i.e. if the count in bits 5:0 is one more than the internal time register of the router (see SpaceWire standard [AD1]). Note that only one router or node in a SpaceWire network should normally operate as a time master generating time codes (see SpaceWire standard [AD1]).

EXT_TICK_OUT

EXT_TIME_OUT

Figure 6-4 Time-Code Output Interface

When a valid time-code is received by the router the value of this time-code (flags plus time value) will be placed on the EXT_TIME_OUT outputs and the EXT_TICK_OUT signal will be set to zero. The EXT_TICK_OUT signal is set to one a short time later, once the EXT_TIME_OUT outputs have stabilised, to indicate that these outputs are valid. They then remain valid until the next time-code is received and the EXT_TICK_OUT signal will be set to zero.

TIME_CTR_RST

TIME_CTR Count

Figure 6-5 Time-code reset interface

When a rising edge is detected on TIME_CTR_RST then the time-code register is reset to zero.

6.3 STATUS INTERFACE OPERATION

The STAT_MUX_ADDR signal determines the output status on STAT_MUX_OUT as shown in Figure 6-6 and in Table 6-1.

CLK

STAT_MUX_ADDR

STAT_MUX_OUT

Figure 6-6 Status Multiplexer output interface

When STAT_MUX_ADDR is stable STAT_MUX_OUT is output from after each clock edge.

Preliminary

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Image 49

Atmel SpW-10X user manual Status Interface Operation, Time-Code Output Interface

Contents

UoDSpW-10X Issue Date Th JulyUserManual Ref. UoDSpW-10X Date Issue Comments Author11th July SpW-10X Contents Control Logic and Operational Modes 103 Global Spacewire Link Control 136 128138 150 143151 15.16 List of Figures 100 List of Tables Able 9-7 E Xternal P ORT C ONTROL/S Tatus F Ields TERMS, Acronyms and Abbreviations Introduction Ref. UoDSpW-10X UserManual DocumentsDate 11th July Applicable Documents Document Number Document Title STAND-ALONE Router User Applications Embedded Router Node Interface Expanding the Number of Router Ports Issue Date 11th July Expanding the number of SpaceWire Ports SpW-10X Functional Overview External Ports Spacewire Ports Routing Table Configuration PortRouting Control Logic and Crossbar CONTROL/STATUS Registers TIME-CODE Processing PIN Locations Pin Signal Type Description VSSA2 GND PFOLVDS33Z EXTOUTDATA90 PO44F EXTOUTDATA108 PO44F EXTTIMEOUT6 PO44F Device Interface Global Signals SpW-10X SpaceWire Signals Spacewire SignalsTestIOEn TestEn DOUTPlus2 DOUTMinus1DOUTMinus2 DOUTPlus3 DINMinus1 11th July DINPlus1DINPlus2 DINMinus2 Lvds Receiver Fail-Safe Resistors SpaceWire Input Fail Safe Resistors SpW-10X UserManual Issue Date 11th July External Port Data SignalsExternal Port Interface Signals PinNo Dir Description Type EXT9INDATA5 Time-Code Signals PinNo Dir Description Type TIME-CODE SignalsSelexttime and the EXTTIMEIN70 EXTTIMEIN70 input Exttickin the value on EXTTIMEIN70 isExttickout is asserted Link error indication Signals PinNo Dir Description Type Status Interface SignalsPower on Configuration Normal Operation Configuration interface timing specification Reset Configuration Signals Feedbdiv at reset 11th July Reset Configuration Signals Dir DescriptionMaps to PORTXRATE20 Maps to Porstartonreqn General POWER, GROUND, PLL and Lvds SignalsDecoupling Lvds Reference PLL with external components External Port Interface Operation Interface Operations TIME-CODE Interface Operation External port read timing specification Time-Code Output Interface Status Interface Operation Status Output Bits Reset configuration interface timing specification Reset Configuration Interface Operation Packet Addresses Spacewire Router Packet Types Packet Header Deletion Packet PriorityPacket Priority Mapping Packet Address Physical Port type Invalid Addresses Supported Commands Command PacketsData Packets Read Command Read Single Address Command Format Issue Date Th July Read Single Address Characteristics SpW-10X EOP Read Incrementing Command Issue Date Th July Read Incrementing Address Characteristics Data Length MS 11th July 00h 11 Read-Modify-Write Command Characteristics Read Modify Write Command Preliminary66 RMW Read-Modify-Write example operation FEh 00h 14 Write Command Characteristics Write Command FEh 01h CRC MSB Status Command Error ResponseCode SpW-10X Local Source Path Address Command Packet Cyclic Redundancy Check Source Path Address Field Date 11 th July Command Packet Fill Bytes Default operating mode Spacewire Link ControlControl Logic and Operational Modes Auto-Start Automatic deactivate driver mode Link-Disable Deactivate driver operating mode Txrate +1 Setting the SpaceWire port transmit data rate TX 10MbitDIV +1 Setting SpaceWire Transmit Data Rate Global Spacewire Link Control Disable on Silence mode Start on request modeCfgstartonreq bit Control Logic and Routing Packet address errorArbitration Arbitration of packets with matching priority Arbitration of three packets with matching priority Arbitration of packets with different priority SpW-10X SpW-10X 10 Normal group adaptive routing Group Adaptive Routing Loop-back with Self-Addressing 11 Group adaptive routing when other ports busy 13 Packet Self-Addressing mode Blocked destination Packet Blocking 14 Destination Node Blocked a Blocking Allowed Mode 16 Destination Node Blocked c Watchdog timer mode Blocking Allowed 19 Destination Node Blocked Watchdog Mode c 21 Source Node Stalled a 100 101 102 Internal Memory MAP Register Definitions Register Addresses Summary Group Adaptive Routing Table Registers 11th July Configuration Register Addresses 106 Bits Name Reset Description Read/Write Value Issue Date Th July GAR Table Register Description Port CONTROL/STATUS Registers Configuration Port Control/Status Register FieldsGeneric port control/status register fields 11th July Bits Name Reset Description Read/Write Value Configuration port control/status register fields 110 111 SpaceWire Port Control/Status Register Fields SpaceWire port control/status register bits 113 114 Router CONTROL/STATUS Registers External port control/status register bitsNetwork Discovery Register Router Identity Register Router Control Register Fields Router Control Register 118 119 Error Active Register Fields Error active Register Time-Code Register Fields Time-Code Register Device Manufacturer and Chip ID Register General Purpose Register Time-Code Enable Register Transmit Clock Control Register 125 126 Unused Registers and Register Bits Destination Key RegisterEmpty packets Writing to a READ-ONLY Register Clock and Reset Timing Parameters Switching CharacteristicsSerial Signals Timing Parameters External port input Fifo timing parameters External Port Timing Parameters TIME-CODE Interface Timing Parameters Time-code Timectrrst interface ERROR/STATUS Interface Timing Parameters 132 Latency and Jitter Switching LatencyClock Periods Router Latency SpaceWire port to External port Issue Date Th July SpaceWire port to SpaceWire portExternal port to SpaceWire port Time-code Latency 10.6.6 200M bits/s Input and Output Bit Rate Example Time-code Jitter DC Characteristics Electrical CharacteristicsOperating Conditions Symbol Description Value Units Absolute Maximum Ratings Absolute Maximum Ratings Symbol Description Value UnitsReliability Information Reliabilty Information Application Guidelines Example Circuit Diagram 139 PCB Design and Layout Guidelines External Ports Status / Power On Configuration InterfaceTime-code Interface PLL Layout Recommendations 12.2.10 PLL Anomalies Anomalies and Warnings 144 Data Strobe Reset Waveform Reset Anomaly 146 Reset Anomaly Workarounds Data Strobe Disable Waveform Parity Error Action Parity Error AnomalyParity Error Anomaly No error end of packet inserted after parity error Parity Error Workaround Technical Support Issue 3.2 to Issue Issue 3.3 to IssueIssue 3.1 to Issue Document Changes Issue 2.5 to Issue Issue 3.0 to Issue Issue 2.3 to Issue Issue 2.4 to IssueIssue 2.2 to Issue Issue 2.0 to Issue Issue 2.1 to IssueIssue 1.7 to Issue Issue 1.6 to Issue Issue 1.0 to Issue Issue 1.1 to Issue