Functional Overview | Atmel SpW-10X instruction

	SpW-10X	Ref.:	UoD_SpW-10X_
	SpaceWire Router		UserManual
	SpaceWire Router	Issue:	3.4
	User Manual	Issue:	3.4
	User Manual	Date:	11th July 2008

3. FUNCTIONAL OVERVIEW

A SpaceWire routing switch comprises a number of SpaceWire ports and a routing matrix. The routing matrix enables packets arriving at one SpaceWire port to be transferred to and sent out of another port on the routing switch. A SpaceWire routing switch is thus able to connect together many SpaceWire nodes, providing a means of routing packets between the nodes connected to it.

The SpW-10X SpaceWire router comprises the following functional logic blocks:

•Eight SpaceWire bi-directional serial ports.

•Two external parallel input/output ports each comprising an input FIFO and an output FIFO.

•A crossbar switch connecting any input port to any output port.

•An internal configuration port accessible via the crossbar switch from the external parallel input/output port or the SpaceWire input/output ports.

•A routing table accessible via the configuration port which holds the logical address to output port mapping.

•Control logic to control the operation of the switch, performing arbitration and group adaptive routing.

•Control registers than can be written and read by the configuration port and which hold control information e.g. link operating speed.

•An external time-code interface comprising tick_in, tick_out and current tick count value.

•Internal status/error registers accessible via the configuration port.

•Watchdog timers on all ports.

•Internal status/error registers accessible via the configuration port using the RMAP protocol [2].

•External status/error signals.

A block diagram of the routing switch is given in Figure 3-1.

Preliminary

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Atmel SpW-10X user manual Functional Overview

Contents

Issue Date Th July UoDSpW-10XUserManual Date Issue Comments Author Ref. UoDSpW-10X11th July SpW-10X Contents Control Logic and Operational Modes 103 Global Spacewire Link Control 128 136138 143 150151 15.16 List of Figures 100 List of Tables Able 9-7 E Xternal P ORT C ONTROL/S Tatus F Ields TERMS, Acronyms and Abbreviations Introduction Ref. UoDSpW-10X UserManual DocumentsDate 11th July Applicable Documents Document Number Document Title STAND-ALONE Router User Applications Embedded Router Node Interface Expanding the Number of Router Ports Issue Date 11th July Expanding the number of SpaceWire Ports SpW-10X Functional Overview External Ports Spacewire Ports Configuration Port Routing TableRouting Control Logic and Crossbar CONTROL/STATUS Registers TIME-CODE Processing PIN Locations Pin Signal Type Description VSSA2 GND PFOLVDS33Z EXTOUTDATA90 PO44F EXTOUTDATA108 PO44F EXTTIMEOUT6 PO44F Device Interface Global Signals SpW-10X SpaceWire Signals Spacewire SignalsTestIOEn TestEn DOUTPlus2 DOUTMinus1DOUTMinus2 DOUTPlus3 DINMinus1 11th July DINPlus1DINPlus2 DINMinus2 Lvds Receiver Fail-Safe Resistors SpaceWire Input Fail Safe Resistors SpW-10X External Port Data Signals UserManual Issue Date 11th JulyExternal Port Interface Signals PinNo Dir Description Type EXT9INDATA5 TIME-CODE Signals Time-Code Signals PinNo Dir Description TypeSelexttime and the EXTTIMEIN70 Exttickin the value on EXTTIMEIN70 is EXTTIMEIN70 inputExttickout is asserted Link error indication Signals PinNo Dir Description Type Status Interface SignalsPower on Configuration Normal Operation Configuration interface timing specification Reset Configuration Signals Feedbdiv at reset 11th July Reset Configuration Signals Dir DescriptionMaps to PORTXRATE20 Maps to Porstartonreqn General POWER, GROUND, PLL and Lvds SignalsDecoupling Lvds Reference PLL with external components External Port Interface Operation Interface Operations TIME-CODE Interface Operation External port read timing specification Time-Code Output Interface Status Interface Operation Status Output Bits Reset configuration interface timing specification Reset Configuration Interface Operation Packet Addresses Spacewire Router Packet Types Packet Priority Packet Header DeletionPacket Priority Mapping Packet Address Physical Port type Invalid Addresses Command Packets Supported CommandsData Packets Read Command Read Single Address Command Format Issue Date Th July Read Single Address Characteristics SpW-10X EOP Read Incrementing Command Issue Date Th July Read Incrementing Address Characteristics Data Length MS 11th July 00h 11 Read-Modify-Write Command Characteristics Read Modify Write Command Preliminary66 RMW Read-Modify-Write example operation FEh 00h 14 Write Command Characteristics Write Command FEh 01h CRC MSB Command Error Response StatusCode SpW-10X Local Source Path Address Command Packet Cyclic Redundancy Check Source Path Address Field Date 11 th July Command Packet Fill Bytes Default operating mode Spacewire Link ControlControl Logic and Operational Modes Auto-Start Automatic deactivate driver mode Link-Disable Deactivate driver operating mode Txrate +1 Setting the SpaceWire port transmit data rate TX 10MbitDIV +1 Setting SpaceWire Transmit Data Rate Global Spacewire Link Control Start on request mode Disable on Silence modeCfgstartonreq bit Packet address error Control Logic and RoutingArbitration Arbitration of packets with matching priority Arbitration of three packets with matching priority Arbitration of packets with different priority SpW-10X SpW-10X 10 Normal group adaptive routing Group Adaptive Routing Loop-back with Self-Addressing 11 Group adaptive routing when other ports busy 13 Packet Self-Addressing mode Blocked destination Packet Blocking 14 Destination Node Blocked a Blocking Allowed Mode 16 Destination Node Blocked c Watchdog timer mode Blocking Allowed 19 Destination Node Blocked Watchdog Mode c 21 Source Node Stalled a 100 101 102 Internal Memory MAP Register Definitions Register Addresses Summary Group Adaptive Routing Table Registers 11th July Configuration Register Addresses 106 Bits Name Reset Description Read/Write Value Issue Date Th July GAR Table Register Description Configuration Port Control/Status Register Fields Port CONTROL/STATUS RegistersGeneric port control/status register fields 11th July Bits Name Reset Description Read/Write Value Configuration port control/status register fields 110 111 SpaceWire Port Control/Status Register Fields SpaceWire port control/status register bits 113 114 External port control/status register bits Router CONTROL/STATUS RegistersNetwork Discovery Register Router Identity Register Router Control Register Fields Router Control Register 118 119 Error Active Register Fields Error active Register Time-Code Register Fields Time-Code Register Device Manufacturer and Chip ID Register General Purpose Register Time-Code Enable Register Transmit Clock Control Register 125 126 Unused Registers and Register Bits Destination Key RegisterEmpty packets Writing to a READ-ONLY Register Switching Characteristics Clock and Reset Timing ParametersSerial Signals Timing Parameters External port input Fifo timing parameters External Port Timing Parameters TIME-CODE Interface Timing Parameters Time-code Timectrrst interface ERROR/STATUS Interface Timing Parameters 132 Latency and Jitter Switching LatencyClock Periods Router Latency SpaceWire port to External port Issue Date Th July SpaceWire port to SpaceWire portExternal port to SpaceWire port Time-code Latency 10.6.6 200M bits/s Input and Output Bit Rate Example Time-code Jitter Electrical Characteristics DC CharacteristicsOperating Conditions Symbol Description Value Units Absolute Maximum Ratings Absolute Maximum Ratings Symbol Description Value UnitsReliability Information Reliabilty Information Application Guidelines Example Circuit Diagram 139 PCB Design and Layout Guidelines Status / Power On Configuration Interface External PortsTime-code Interface PLL Layout Recommendations 12.2.10 PLL Anomalies Anomalies and Warnings 144 Data Strobe Reset Waveform Reset Anomaly 146 Reset Anomaly Workarounds Data Strobe Disable Waveform Parity Error Anomaly Parity Error ActionParity Error Anomaly No error end of packet inserted after parity error Parity Error Workaround Technical Support Issue 3.2 to Issue Issue 3.3 to IssueIssue 3.1 to Issue Document Changes Issue 2.5 to Issue Issue 3.0 to Issue Issue 2.4 to Issue Issue 2.3 to IssueIssue 2.2 to Issue Issue 2.0 to Issue Issue 2.1 to IssueIssue 1.7 to Issue Issue 1.6 to Issue Issue 1.0 to Issue Issue 1.1 to Issue