SpW-10X

Ref.:

UoD_SpW-10X_

 

 

 

 

 

SpaceWire Router

 

UserManual

 

 

 

 

 

Issue:

3.4

 

 

 

 

 

User Manual

 

 

 

 

 

Date:

11th July 2008

 

 

 

 

 

 

 

 

 

 

 

5.2.3 Operation with 5V Powered LVDS Devices

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WARNING

 

 

 

 

Since LVDS is based on a current loop it should not matter what the supply voltage is to an LVDS device connected to the SpW-10X router. However, there is a potential problem when connecting to devices with power supplies greater than 3.3 V, which is the supply voltage of the SpW-10X device. It should be emphasised that during normal operation there is no problem, but if the LVDS device connected to the SpW-10X device can fail in such a way as to put a higher voltage than 3.3 V on to the pins of the SpW-10X device then this can cause a problem. The simplest way to overcome this potential problem is to ensure that the LVDS devices driving the SpW-10X device are all powered by 3.3V.

5.3 EXTERNAL PORT DATA SIGNALS

The External port signals are listed in Table 5-3. The timing of these signals is shown in Figure 6-1 External port write timing specification and Figure 6-2 External port read timing specification.

Table 5-3 External Port Interface Signals

PinNo

Signal

Dir

Description

Type

 

 

 

 

 

112

EXT9_OUT_DATA(8)

Out

Output data from external port number one

CMOS3V3

111

EXT9_OUT_DATA (7)

 

FIFO. Bit eight determines the type - data,

 

110

EXT9_OUT_DATA(6)

 

EOP or EEP. The encodings are defined as:

 

107

EXT9_OUT_DATA(5)

 

 

 

104

EXT9_OUT_DATA(4)

 

(8)(7......0) Bits

 

103

EXT9_OUT_DATA(3)

 

(0)(dddddddd) - Data byte

 

102

EXT9_OUT_DATA(2)

 

(1)(XXXXXXX0) - EOP.

 

101

EXT9_OUT_DATA(1)

 

 

 

(1)(XXXXXXX1) - EEP.

 

100

EXT9_OUT_DATA(0)

 

 

 

 

 

 

 

 

Bit 7 is the most significant bit of the data byte.

 

 

 

 

 

 

113

EXT9_OUT_EMPTY_N

Out

FIFO ready signal for external output port

CMOS3V3

 

 

 

zero. When high the FIFO has data. When low

 

 

 

 

the FIFO is empty.

 

 

 

 

 

 

114

EXT9_OUT_READ_N

In

Asserted (low) to read from the external output

CMOS3V3

 

 

 

port zero FIFO.

 

 

 

 

A pull-up resistor (e.g. 4k7 Ω) should be

 

 

 

 

connected to this input if External FIFO port 9

 

 

 

 

is not being used.

 

 

 

 

 

 

123

EXT9_IN_DATA(8)

In

Input data to external port number one FIFO.

CMOS3V3

122

EXT9_IN_DATA(7)

 

Bit eight determines the type - data, eop or

 

121

EXT9_IN_DATA(6)

 

eep. The encodings are defined as:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Preliminary

37

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Atmel SpW-10X user manual External Port Data Signals, UserManual Issue Date 11th July