Atmel SpW-10X Transmit Clock Control Register, SpaceWire Router, User Manual, Preliminary

			SpW-10X	Ref.:	UoD_SpW-10X_
			SpaceWire Router		UserManual
				Issue:	3.4
			User Manual
				Date:	11th July 2008
		Table 9-14 Time-Code Enable Register Fields
Bits	Name	Reset	Description			Read/Write
		Value
0	Reserved	0	Reserved bit			R
8:1	SpaceWire	0	Time-code distribution enable bits for SpaceWire			R/W
	Time-Code		ports 8 to 1 respectively. The appropriate bit
	Enable		should be set to 1 to enable time-code distribution
			through the corresponding port.
9	External Time-	1	Time-code distribution enable for External time-			R/W
	Code Interface		code port
	Enable
11:10	Not Used	All bits	-			R
		set to
		zero
12	Time-code Flag	0	Time-code flag interpretation mode			R/W
	Mode		When ‘0’ - Time-code control bit flags are
			distributed with valid time-code values regardless
			of the value of the time-code control flags
			When ‘1’ - When the time-code control flags are
			“00” then valid time-codes are distributed. When
			the time-code control flags are not “00” then the
			time-code is discarded and the internal time-code
			register is not updated.
31:13	Not used	All bits				R
		set to
		zero

9.5.9 Transmit Clock Control Register

The transmit clock control register address is 264 (0x0000 0108).

The transmit clock control register is shown in Figure 9-10. Bits 1 to 0 are used to determine the output divide ratio (TXDIV) for the transmit clock internal PLL. Bits 15 to 8 are used to stop the transmitter clocks of SpaceWire interfaces that are not being used to save power i.e. only clock of the SpaceWire ports that are going to be used should be enabled. Bits 20 to 16 are used to set the default 10Mbits/s transmit data rate (TX10MbitDIV).

Note: The transmit clock should not be disabled when an output port is sending data or when the interface is in the run state. The port control/status registers can be used to determine if an output port is currently connected to an input port and therefore transferring data.

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