PECI Interface
7PECI Interface
7.1Platform Environment Control Interface (PECI)
7.1.1Introduction
PECI uses a single wire for
The interface design was optimized for interfacing to Intel processors in both single processor and multiple processor environments. The single wire interface provides low board routing overhead for the multiple load connections in the congested routing area near the processor and chipset components. Bus speed, error checking, and low protocol overhead provides adequate link bandwidth and reliability to transfer critical device operating conditions and configuration information.
The PECI bus offers:
•A wide speed range from 2 Kbps to 2 Mbps
•CRC check byte used to efficiently and atomically confirm accurate data delivery
•Synchronization at the beginning of every message minimizes device timing accuracy requirements.
For single processor temperature monitoring and fan speed control management purposes, the PECI 3.0 commands that are commonly implemented includes Ping(),
GetDIB(), GetTemp(), TCONTROL and TjMax(TCC) read. The TCONTROL and TCC read command can be implemented by utilizing the RdPkgConfig() command.
7.1.1.1Fan Speed Control with Digital Thermal Sensor
Processor fan speed control is managed by comparing DTS temperature data against
the
The DTS temperature data is delivered over PECI, in response to a GetTemp() command, and reported as a relative value to TCC activation target. The temperature data reported over PECI is always a negative value and represents a delta below the onset of thermal control circuit (TCC) activation, as indicated by the PROCHOT# signal. Therefore, as the temperature approaches TCC activation, the value approaches zero degrees.
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Thermal/Mechanical Specifications and Design Guidelines | 63 |