Intel IXP43X manual Intel IXP435 Network Processor Block Diagram

Hardware Design Guidelines—Intel®IXP43X Product Line of Network Processors

Figure 1. Intel® IXP435 Network Processor Block Diagram

		HSS
	UTOPIA 2/ MII				NPE A
		MII		NPE C			North AHB133. 32		MHz x32bits
		ts	AES/ 3DES/				North AHB
					DES/	us B us
		x 32 bi
			SHA/ MD-5				Arbiter
	SSP
	High Speed	66. 66MHz				Queue Stat
	UART
	921 Kbaud
16 GPIO	GPIO	APB
											16/ 32 BITS
			AHB								+ ECC
	Interrupt									DDRII/ I MEMORY	DDR 266 /
			Slave /
	Controller		APB			QUEUE		AHB/ AHB		CONTROLLER	DDRII 400
			Master			MANAGER		BRIDGE		UNIT
	IBPMU		BRIDGE							266/ 400
										M PI 13 3 . 3 2MHz /200 MH z x 6 4 bit s
					South AHB133. 32		MHz x32 bits
	Timers						South AHB
							Arbiter
			USB Port		USB Port	EXPANSION		PCI
			HOST		HOST
			CONTROLLER		CONTROLLER	BUS Controller		CONTROLLER		XScale Processor
			VERSION2 .0		VERSION 2.0	8/16 bit 80MHz		32 bit 33 MHz
					UTMI					32 KB I - CACHE
			UTMI							32 KB D - CACHE
			2.0 PHY		2.0 PHY					2KB MINI D- CACHE
										266/400/533/667 MHz
			Master on South AHB					Bus Arbiters
			Master on North AHB					Slave Only
								AHB Slave/APB Master

Note: Figure 1 shows the Intel® IXP435 Network Processor. For details on feature and SKU support listed by processor, see the Intel® IXP43X Product Line of Network Processors Datasheet.

	Intel® IXP43X Product Line of Network Processors
April 2007	HDG
Document Number: 316844; Revision: 001US	13