Intel IXP43X manual 3.3.3 8-Bit Device Interface, Setting Intel XScale Processor Operation Speed

Models: IXP43X

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Setting Intel XScale® Processor Operation Speed

Intel® IXP43X Product Line of Network Processors—Hardware Design Guidelines

Table 7.

Setting Intel XScale® Processor Operation Speed

 

 

 

Intel XScale® Processor

Cfg0

Cfg1

 

Cfg_en_n

Actual Core Speed

 

Speed

 

 

EX_ADDR[21]

EX_ADDR[22]

EX_ADDR[23]

(MHz)

 

(Factory Part Speed)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

667 MHz

X

X

 

1

667 MHz

 

 

 

 

 

 

 

 

667 MHz

0

0

 

0

667 MHz

 

 

 

 

 

 

 

 

667 MHz

1

0

 

0

533 MHz

 

 

 

 

 

 

 

 

667 MHz

0

1

 

0

266 MHz

 

 

 

 

 

 

 

 

667 MHz

1

1

 

0

400 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

533 MHz

X

X

 

1

533 MHz

 

 

 

 

 

 

 

 

533 MHz

0

0

 

0

533 MHz

 

 

 

 

 

 

 

 

533 MHz

1

0

 

0

533 MHz

 

 

 

 

 

 

 

 

533 MHz

0

1

 

0

266 MHz

 

 

 

 

 

 

 

 

533 MHz

1

1

 

0

400 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

400 MHz

X

X

 

1

400 MHz

 

 

 

 

 

 

 

 

400 MHz

0

0

 

0

400 MHz

 

 

 

 

 

 

 

 

400 MHz

1

0

 

0

400 MHz

 

 

 

 

 

 

 

 

400 MHz

0

1

 

0

266 MHz

 

 

 

 

 

 

 

 

400 MHz

1

1

 

0

400 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

266 MHz

X

X

 

X

266 MHz

 

 

 

 

 

 

 

Note: The Intel XScale processor can operate at slower speeds than the factory programmed speed setting. This is done by placing a value on Expansion bus address bits 23,22,21 when PLL_LOCK is deasserted and knowing the speed grade of the part from the factory. Column 1 above denotes the speed grade of the part from the factory. Column 2, 3, and 4 denotes the values captured on the Expansion Bus address bits when PLL_LOCK is deasserted. Column 5 represents the speed at which the Intel XScale processor speed is operating at.

3.3.38-Bit Device Interface

The IXP43X network processors support 8-bit-wide data bus devices (byte mode). For interface cycles, the data lines and control signals can be connected as shown in Figure 3 on page 26. During byte mode accesses, the remaining data signals not being used EX_DATA[15:8], are driven by the processor to an unpredictable state on WRITE cycles and tri-stated during READ cycles.

When booting an 8-bit flash device, the expansion bus must be configured during reset to the 8-bit mode, bit 0 and 7 of Configuration Register 0 must be set as follows (see Table 6):

Bit 0 = 1. By default this bit is set high when coming off reset or any time reset is asserted.

Bit 7 = 0. This can be done by placing an external 470 ohm pull-down resistor to the pin EX_ADDR[7].

Intel® IXP43X Product Line of Network Processors

 

HDG

April 2007

24

Document Number: 316844; Revision: 001US

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Intel IXP43X manual 3.3.3 8-Bit Device Interface, Setting Intel XScale Processor Operation Speed