Table 10-2. Port-80 Codes (continued)
Port 80 Code | Reason |
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|
18 | 8254 timer initialization |
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1A | 8237 DMA controller initialization |
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|
1C | Reset Programmable Interrupt Controller |
|
|
20 | Test DRAM refresh |
|
|
22 | Test 8742 Keyboard Controller |
|
|
24 | Set ES segment register to 4GB |
|
|
28 | Autosize DRAM |
|
|
2A | Clear 512K base RAM |
|
|
2C | RAM failure on address line xxxx* |
|
|
2E | RAM failure on data bits xxxx* of low byte of memory bus |
|
|
30 | RAM failure on data bits xxxx* of high byte of memory bus |
|
|
32 | Test CPU |
|
|
34 | Test CMOS |
|
|
35 | RAMInitialize alternate chipset registers. |
|
|
36 | Warm start shut down |
|
|
37 | Reinitialize the chipset (MB only) |
|
|
38 | Shadow system BIOS ROM |
|
|
39 | Reinitialize the cache (MB only) |
|
|
3A | Autosize cache |
|
|
3C | Configure advanced chipset registers |
|
|
3D | Load alternate registers with CMOS valuesnew |
|
|
Continued
M440LX Server System Product Guide | 215 |