Figure B-2FMC HPC Connector Pinout | Xilinx ML605 specs

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UG534 (v1	ML605
.2.1) January 21, 2010	Hardware User Guide

Figure B-2:FMC HPC Connector Pinout

	K	J	H	G	F	E	D	C	B	A
1	VR EF_B_M2C	GND	VRE F_A_M2C	G ND	PG _M2C	GND	P G_C2M	G ND	RE S1	GND
2	GND	C LK3_M2C_P	P RS NT_M2C _L	CLK1_M2C _P	GND	HA01_P _C C	G ND	DP 0_C2M_P	G ND	DP 1_M2C_P
3	GND	C LK3_M2C_N	G ND	CLK1_M2C _N	GND	HA01_N_C C	G ND	DP 0_C2M_N	G ND	DP 1_M2C_N
4	CLK2_M2C _P	GND	C LK0_M2C_P	G ND	HA00_P _C C	G ND	GBTC LK0_M2C_P	G ND	DP 9_M2C_P	G ND
5	CLK2_M2C _N	GND	C LK0_M2C_N	G ND	HA00_N_C C	G ND	GBTC LK0_M2C_N	G ND	DP 9_M2C_N	G ND
6	GND	HA03_P	GND	LA00_P _C C	G ND	HA05_P	GND	DP0_M2C _P	GND	DP2_M2C _P
7	HA02_P	HA03_N	LA02_P	LA00_N_C C	HA04_P	HA05_N	GND	DP0_M2C _N	GND	DP2_M2C _N
8	HA02_N	GND	LA02_N	GND	HA04_N	GND	LA01_P _C C	G ND	DP 8_M2C_P	G ND
9	GND	HA07_P	GND	LA03_P	GND	HA09_P	LA01_N_C C	G ND	DP 8_M2C_N	G ND
10	HA06_P	HA07_N	LA04_P	LA03_N	HA08_P	HA09_N	GND	LA06_P	GND	DP3_M2C _P
11	HA06_N	GND	LA04_N	GND	HA08_N	GND	LA05_P	LA06_N	GND	DP3_M2C _N
12	G ND	HA11_P	GND	LA08_P	GND	HA13_P	LA05_N	GND	DP7_M2C _P	GND
13	HA10_P	HA11_N	LA07_P	LA08_N	HA12_P	HA13_N	GND	G ND	DP 7_M2C_N	G ND
14	HA10_N	GND	LA07_N	GND	HA12_N	GND	LA09_P	LA10_P	GND	DP4_M2C _P
15	G ND	HA14_P	GND	LA12_P	GND	HA16_P	LA09_N	LA10_N	GND	DP4_M2C _N
16	HA17_P _C C	HA14_N	LA11_P	LA12_N	HA15_P	HA16_N	GND	G ND	DP 6_M2C_P	G ND
17	HA17_N_C C	G ND	LA11_N	GND	HA15_N	GND	LA13_P	GND	DP6_M2C _N	GND
18	G ND	HA18_P	GND	LA16_P	GND	HA20_P	LA13_N	LA14_P	GND	DP5_M2C _P
19	HA21_P	HA18_N	LA15_P	LA16_N	HA19_P	HA20_N	GND	LA14_N	GND	DP5_M2C _N
20	HA21_N	GND	LA15_N	GND	HA19_N	GND	LA17_P _C C	G ND	GBTC LK 1_M2C_P	G ND
21	G ND	HA22_P	GND	LA20_P	GND	HB03_P	LA17_N_C C	G ND	GB TC LK 1_M2C_N	G ND
22	HA23_P	HA22_N	LA19_P	LA20_N	HB02_P	HB03_N	GND	LA18_P _C C	G ND	DP 1_C2M_P
23	HA23_N	GND	LA19_N	GND	HB02_N	GND	LA23_P	LA18_N_C C	G ND	DP 1_C2M_N
24	G ND	HB01_P	GND	LA22_P	GND	HB05_P	LA23_N	GND	DP9_C 2M_P	GND
25	HB00_P _C C	HB01_N	LA21_P	LA22_N	HB04_P	HB05_N	GND	G ND	DP 9_C2M_N	G ND
26	HB00_N_C C	G ND	LA21_N	GND	HB04_N	GND	LA26_P	LA27_P	GND	DP2_C 2M_P
27	G ND	HB07_P	GND	LA25_P	GND	HB09_P	LA26_N	LA27_N	GND	DP2_C 2M_N
28	HB06_P _C C	HB07_N	LA24_P	LA25_N	HB08_P	HB09_N	GND	G ND	DP 8_C2M_P	G ND
29	HB06_N_C C	G ND	LA24_N	GND	HB08_N	GND	TCK	GND	DP8_C 2M_N	GND
30	G ND	HB11_P	GND	LA29_P	GND	HB13_P	TDI	S CL	GND	DP3_C 2M_P
31	HB10_P	HB11_N	LA28_P	LA29_N	HB12_P	HB13_N	TDO	S DA	GND	DP3_C 2M_N
32	HB10_N	GND	LA28_N	GND	HB12_N	GND	3P3VAUX	GND	DP7_C 2M_P	GND
33	G ND	HB15_P	GND	LA31_P	GND	HB19_P	TMS	G ND	DP 7_C2M_N	G ND
34	HB14_P	HB15_N	LA30_P	LA31_N	HB16_P	HB19_N	TR ST_L	GA0	G ND	DP 4_C2M_P
35	HB14_N	GND	LA30_N	GND	HB16_N	GND	G A1	12P0V	G ND	DP 4_C2M_N
36	G ND	HB18_P	GND	LA33_P	GND	HB21_P	3P 3V	GND	DP6_C 2M_P	GND
37	HB17_P _C C	HB18_N	LA32_P	LA33_N	HB20_P	HB21_N	GND	12P0V	DP6_C 2M_N	GND
38	HB17_N_C C	G ND	LA32_N	GND	HB20_N	GND	3P3V	G ND	GND	DP5_C 2M_P
39	G ND	VIO_B_M2C	G ND	VADJ	GND	VADJ	G ND	3P 3V	GND	DP5_C 2M_N
40	VIO_B_M2C	GND	VADJ	G ND	VADJ	GND	3P3V	G ND	RE S0	GND

Figure B-2shows the pinout of the FMC HPC connector.

Appendix B: VITA 57.1 FMC LPC (J63) and HPC (J64) Connector Pinout

Image 78

Xilinx ML605 manual Figure B-2FMC HPC Connector Pinout

Contents

ML605 Hardware User Guide UG534 v1.2.1 January 21, 2010 optional Revision History Date Version Revision Table of Contents ML605 Hardware User Guide About This Guide Additional Support Resources Preface About This Guide ML605 Evaluation Board Additional Information SMA FeaturesML605 Evaluation Board IIC Eeprom 1 KB Overview Fpga Init Fpga Done Block Diagram 1ML605 High-Level Block Diagram Detailed Description ML605 FeaturesFeature DDR3 Sodimm ML605 Evaluation Board ML605 Features Cont’d SgmiiWDW6TP Configuration Virtex-6 XC6VLX240T-1FFG1156 Fpga Cclk Direction 2Virtex-6 Fpga Configuration Modes M20Voltage Rails 3Voltage Rails U1 Fpga Bank VCC1V5FPGA MB DDR3 Memory SodimmDetailed Description 3Voltage Rails Cont’d U1 Fpga Bank 4DDR3 Sodimm Connections ML605 Evaluation Board 4DDR3 Sodimm Connections Cont’d DDR3A9 DDR3D30 DQ30 DDR3DM0 See the Micron Technology, Inc. for more information Ref Mb Platform Flash XL MB Linear BPI Flash ML605 Flash Boot Options FLASHD2 DQ2 FLASHD0 DQ0FLASHD1 DQ1 FLASHD3 DQ3 Fpga Design Considerations for the Configuration Flash System ACE CF and CompactFlash Connector 6System ACE CF Connections U1 Fpga Pin Schematic Net Name USB Jtag Clock Generation Oscillator DifferentialOscillator Socket Single-Ended 7ML605 Oscillator Socket Pin 1 Location Identifiers SMA Connectors Differential 8ML605 Oscillator Pin 1 Location Identifiers SMA Pin SmarefclknSmarefclkp Multi-Gigabit Transceivers GTX MGTs ICS PCI Express Endpoint Connectivity 12PCIe Lane Size Select Jumper J42 8PCIe Edge Connector Connections PCIE100MMGT0P AA3 PCIERX7PAA4 PCIERX7N GTXE1X0Y6 SFP Module Connector 11 /100/1000 Tri-Speed Ethernet PHY 11PHY Default Interface Mode Jumper Settings J66 J67 J6812Board Connections for PHY Configuration Pins Bit2 Bit1 Bit0 13Ethernet PHYConnections U1 Fpga Pin 12Board Connections for PHY Configuration Pins Cont’dSgmii GTX Transceiver Clock Generation U80 M88E1111 PHYRXD5 PHYRXD4RXD4 RXD5 USB-to-UART Bridge VbusGround USB Controller 16USB Controller ConnectionsU81 USB Controller DVI Codec 17DVI Controller ConnectionsU38 Chrontel CH7301C IIC Bus 14IIC Bus Topology Kb NV Memory Iicsdamain SDAIicsclmain SCL Designator Signal Name Color Label Description Status LEDs Ethernet PHY Status LEDs 16Ethernet PHY Status LEDs Controlled LED User I/OFpga Init and Done LEDs Fpgainitb 18User LEDs and Gpio Connector, Directional LEDs User LEDs User Pushbutton Switches Detailed Description 21User LED Connections Fpga U1 PinGpio J62 Pin Controlled LED User DIP Switch Switch Pin User SMA Gpio UsersmagpionUsersmagpiop LCD Display 16 Character x 2 Lines J41 Pin Switches Power On/Off Slide Switch SW2 Sysaceresetb Pushbutton SW3 Active-Low Fpgaprogb Pushbutton SW4 Active-Low System ACE CF CompactFlash Image Select DIP Switch S1 26System ACE CF CompactFlash Image Select DIP Switch S1 26ML605 Configuration Modes M20 Bus Width Vita 57.1 FMC HPC Connector Master BPI 28VITA 57.1 FMC HPC Connections HPC Pin 28VITA 57.1 FMC HPC Connections Cont’d FMCHPCHB13P FMCHPCHB09NFMCHPCHB08P FMCHPCHB08N Detailed Description 28VITA 57.1 FMC HPC Connections Cont’d VREFAM2C Vadj VadjVIOBM2C Vadj VREFBM2C Vita 57.1 FMC LPC Connector 30VITA 57.1 FMC LPC Connections LPC Pin Power Management AC Adapter and Input Power Jack/SwitchDetailed Description 30VITA 57.1 FMC LPC Connections Cont’d Onboard Power Regulation 28ML605 Onboard Power Regulators Vccaux UCD9240PFCVccintfpga UCD7230RGWR System Monitor 29System Monitor External Reference System Monitor Header J35 12V Supply Monitor Fan Controller Bank Configuration Options Configuration Options ML605 Evaluation Board Table A-1Default Switch Settings Function/Type Default Gmii Vita 57.1 FMC LPC J63 and HPC J64 Connector Pinout Figure B-2FMC HPC Connector Pinout ML605 Master UCF Appendix C ML605 Master UCF NET DDR3D9 NET DDR3DQS0P NET FLASHA21 ML605 Hardware User Guide UG534 v1.2.1 January 21 NET FMCHPCHB03P NET FMCHPCLA16N NET FMCLPCPRSNTM2CL NET Iicsdadvi NET PCIERX2N NET Pmbusdatals NET Sfplos NET Sfprxn NET Sfprxp NET USBD6LS References Appendix D References