Texas Instruments TMS320C67X/C67X+ DSP manuals
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Texas Instruments TMS320C67X/C67X+ DSP Manual
465 pages 1.82 Mb
2 Copyright 2005, Texas Instruments IncorporatedPreface 3 Read This FirstAbout This Manual Notational Conventions Related Documentation From Texas Instruments 4 Trademarks5 Contents12 Figures14 Tables17 Examples18 Introduction27 CPU Data Paths and Control61 Instruction SetChapter 362 3.1 Instruction Operation and Execution NotationsTable 31 explains the symbols used in the instruction descriptions. Table 31. Instruction Operation and Execution Notations 67 3.2 Instruction Syntax and Opcode Notations69 3.3 Overview of IEEE Standard Single- and Double-Precision Formats74 3.4 Delay Slots76 3.5 Parallel Operations79 3.6 Conditional OperationsTable 39. Registers That Can Be Tested by Conditional Operations 80 3.7 Resource Constraints90 3.8 Addressing Modes94 3.9 Instruction Compatibility3.10 Instruction Descriptions95 The way each instruction is described.96 Example 98 ABS Absolute Value With Saturation ABS 100 ABSDP Absolute Value, Double-Precision Floating-Point ABSDP 102 ABSSP Absolute Value, Single-Precision Floating-Point ABSSP 104 ADD Add Two Signed Integers Without SaturationSyntax ADD (.unit) src1, src2, dst or ADD (.D1 or .D2) src2, src1, dst 106 ADD 108 ADDAB Add Using Byte Addressing Mode ADDAB 110 ADDAD Add Using Doubleword Addressing Mode ADDAD 112 ADDAH Add Using Halfword Addressing Mode ADDAH 114 ADDAW Add Using Word Addressing Mode ADDAW 116 ADDDP Add Two Double-Precision Floating-Point Values ADDDP 118 ADDDP 119 Add Signed 16-Bit Constant to Register ADDK120 ADDSP Add Two Single-Precision Floating-Point Values ADDSP 122 ADDSP 123 Add Two Unsigned Integers Without Saturation ADDU124 ADDU 125 Add Two 16-Bit Integers on Upper and Lower Register Halves ADD2126 ADD2 127 Bitwise AND ANDSyntax AND (.unit) src1, src2, dst 128 AND 129 Branch Using a Displacement130 BExample Table 313 gives the program counter values and actions for the following code example. Table 313. Program Counter Values for Example Branch Using a Displacement 131 Branch Using a Register132 BTable 314. Program Counter Values for Example Branch Using a Register 133 Branch Using an Interrupt Return Pointer B IRP134 B IRP Table 315. Program Counter Values for B IRP Instruction 135 Branch Using NMI Return Pointer B NRP136 B NRP Table 316. Program Counter Values for B NRP Instruction 137 Clear a Bit Field138 CLR 140 CMPEQ Compare for Equality, Signed Integers CMPEQ 142 CMPEQDP Compare for Equality, Double-Precision Floating-Point Values CMPEQDP 144 CMPEQSP Compare for Equality, Single-Precision Floating-Point Values CMPEQSP 146 CMPGT Compare for Greater Than, Signed Integers CMPGTSyntax CMPGT (.unit) src1, src2, dst .unit = .L1 or .L2 148 CMPGT Example 1 Example 2 Example 3 Example 4 149 Compare for Greater Than, Double-Precision Floating-Point Values CMPGTDP150 CMPGTDP 151 Compare for Greater Than, Single-Precision Floating-Point Values CMPGTSP152 CMPGTSP 153 Compare for Greater Than, Unsigned Integers CMPGTU154 CMPGTU 155 Compare for Less Than, Signed IntegersSyntax CMPLT (.unit) src1, src2, dst .unit = .L1 or .L2 156 CMPLT 158 CMPLTDP Compare for Less Than, Double-Precision Floating-Point Values CMPLTDP 160 CMPLTSP Compare for Less Than, Single-Precision Floating-Point Values CMPLTSP 162 CMPLTU Compare for Less Than, Unsigned Integers CMPLTU 164 DPINT Convert Double-Precision Floating-Point Value to Integer DPINT 166 DPSP Convert Double-Precision Floating-Point Value to Single-Precision DPSP 168 DPTRUNC Convert Double-Precision Floating-Point Value to Integer With Truncation DPTRUNC 170 EXT Extract and Sign-Extend a Bit Field EXT 172 EXT 173 Extract and Zero-Extend a Bit Field174 EXTU 177 Convert Signed Integer to Double-Precision Floating-Point Value INTDP179 Convert Unsigned Integer to Double-Precision Floating-Point Value INTDPU181 Convert Signed Integer to Single-Precision Floating-Point Value INTSP182 INTSPU Convert Unsigned Integer to Single-Precision Floating-Point Value INTSPU 183 Load Byte From Memory With a 5-Bit Unsigned Constant Offset orTable 317. Data Types Supported by LDB(U) Instruction 184 LDB(U) 186 Load Byte From Memory With a 15-Bit Unsigned Constant OffsetTable 318. Data Types Supported by LDB(U) Instruction (15-Bit Offset) 188 LDDW Load Doubleword From Memory With an Unsigned Constant Offset or Register Offset LDDW 190 LDDW 191 Load Halfword From Memory With a 5-Bit Unsigned Constant Offset or Register OffsetTable 319. Data Types Supported by LDH(U) Instruction 192 LDH(U) 194 Load Halfword From Memory With a 15-Bit Unsigned Constant Offset195 Table 320. Data Types Supported by LDH(U) Instruction (15-Bit Offset)196 LDW Load Word From Memory With a 5-Bit Unsigned Constant Offset or 198 LDW Example 1 Example 2 Example 3 199 Load Word From Memory With a 15-Bit Unsigned Constant Offset200 LDW 201 Leftmost Bit Detection LMBD202 LMBD 203 Multiply Signed 16 LSB Signed 16 LSB MPY204 MPY 205 Multiply Two Double-Precision Floating-Point Values MPYDP206 MPYDP 207 Multiply Signed 16 MSB Signed 16 MSB MPYH208 MPYH 209 Multiply Signed 16 MSB Signed 16 LSB MPYHL210 MPYHL 211 Multiply Unsigned 16 MSB Unsigned 16 LSB MPYHLU212 MPYHSLU Multiply Signed 16 MSB Unsigned 16 LSB MPYHSLU 213 Multiply Signed 16 MSB Unsigned 16 MSB MPYHSU214 MPYHU Multiply Unsigned 16 MSB Unsigned 16 MSB MPYHU 215 Multiply Unsigned 16 MSB Signed 16 LSB MPYHULS216 MPYHUS Multiply Unsigned 16 MSB Signed 16 MSB MPYHUS 217 Multiply 32-Bit 32-Bit Into 32-Bit Result MPYI218 MPYI 219 Multiply 32-Bit 32-Bit Into 64-Bit Result MPYID220 MPYID 221 Multiply Signed 16 LSB Signed 16 MSB MPYLH222 MPYLH 223 Multiply Unsigned 16 LSB Unsigned 16 MSB MPYLHU224 MPYLSHU Multiply Signed 16 LSB Unsigned 16 MSB MPYLSHU 225 Multiply Unsigned 16 LSB Signed 16 MSB MPYLUHS226 MPYSP Multiply Two Single-Precision Floating-Point Values MPYSP 228 MPYSPDP Multiply Single-Precision Floating-Point Value Double-Precision MPYSPDP 230 MPYSP2DP Multiply Two Single-Precision Floating-Point Values for Double-Precision Result MPYSP2DP 232 MPYSU Multiply Signed 16 LSB Unsigned 16 LSB MPYSU 234 MPYU Multiply Unsigned 16 LSB Unsigned 16 LSB MPYU 236 MPYUS Multiply Unsigned 16 LSB Signed 16 LSB MPYUS 238 MV Move From Register to Register MVSyntax MV (.unit) src2, dst .unit = .L1, .L2, .S1, .S2, .D1, .D2 240 MVC Move Between Control File and Register File MVC 242 MVC Table 321. Register Addresses for Accessing the Control Registers 243 Move Signed Constant Into Register and Sign Extend MVK244 MVK 245 Move 16-Bit Constant Into Upper Bits of Register MVKH/MVKLH246 MVKH/MVKLH 247 Move Signed Constant Into Register and Sign Extend MVKL248 MVKL 249 Negate NEG250 NOP No Operation NOP 252 NORM Normalize Integer NORM 254 NOT Bitwise NOT NOT 255 Bitwise OR ORSyntax OR (.unit) src1, src2, dst 256 OR 257 Double-Precision Floating-Point Reciprocal Approximation RCPDP258 RCPDP 259 Single-Precision Floating-Point Reciprocal Approximation RCPSP260 RCPSP 261 Double-Precision Floating-Point Square-Root Reciprocal Approximation RSQRDP262 RSQRDP 263 Single-Precision Floating-Point Square-Root Reciprocal Approximation RSQRSP264 RSQRSP 265 Add Two Signed Integers With Saturation266 SADD 268 SAT Saturate a 40-Bit Integer to a 32-Bit Integer SAT 270 SET Set a Bit Field SET 272 SET 273 Arithmetic Shift Left SHLSyntax SHL (.unit) src2, src1, dst .unit = .S1 or .S2 274 SHL 275 Arithmetic Shift Right SHR276 SHR 277 Logical Shift Right SHRU278 SHRU 279 Multiply Signed 16 LSB Signed 16 LSB With Left Shift and Saturation SMPY280 SMPY 281 Multiply Signed 16 MSB Signed 16 MSB With Left Shift and Saturation SMPYH282 SMPYHL Multiply Signed 16 MSB Signed 16 LSB With Left Shift and Saturation SMPYHL 284 SMPYLH Multiply Signed 16 LSB Signed 16 MSB With Left Shift and Saturation SMPYLH 286 SPDP Convert Single-Precision Floating-Point Value to Double-Precision SPDP 288 SPINT Convert Single-Precision Floating-Point Value to Integer SPINT 290 SPTRUNC Convert Single-Precision Floating-Point Value to Integer With Truncation SPTRUNC 292 SSHL Shift Left With Saturation SSHL 294 SSUB Subtract Two Signed Integers With Saturation SSUB 296 STB Store Byte to Memory With a 5-Bit Unsigned Constant Offset or 298 STB Store Byte to Memory With a 15-Bit Unsigned Constant Offset 300 STH Store Halfword to Memory With a 5-Bit Unsigned Constant Offset or 302 STH 303 Store Halfword to Memory With a 15-Bit Unsigned Constant Offset304 STH 305 Store Word to Memory With a 5-Bit Unsigned Constant Offset or306 STW 307 Store Word to Memory With a 15-Bit Unsigned Constant Offset308 STW 309 Subtract Two Signed Integers Without SaturationSyntax SUB (.unit) src1, src2, dst or SUB (.D1 or .D2) src2, src1, dst 312 SUB 313 Subtract Using Byte Addressing Mode SUBAB314 SUBAB 315 Subtract Using Halfword Addressing Mode SUBAH316 SUBAW Subtract Using Word Addressing Mode SUBAW 318 SUBC Subtract Conditionally and ShiftUsed for Division SUBC 320 SUBDP Subtract Two Double-Precision Floating-Point Values SUBDP 322 SUBDP 323 Subtract Two Single-Precision Floating-Point Values324 SUBSP 326 SUBU Subtract Two Unsigned Integers Without Saturation SUBU 328 SUB2 Subtract Two 16-Bit Integers on Upper and Lower Register Halves SUB2 330 XOR Bitwise Exclusive OR XORSyntax XOR (.unit) src1, src2, dst .unit = .L1, .L2, .S1, .S2 332 ZERO Zero a Register ZERO 333 Pipeline396 Interrupts422 Instruction Compatibility428 Mapping Between Instruction and Functional Unit434 .D Unit Instructions and Opcode Maps439 .L Unit Instructions and Opcode Maps443 .M Unit Instructions and Opcode Maps447 .S Unit Instructions and Opcode Maps452 No Unit Specified Instructions and Opcode Maps455 Index
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