Addressing Modes

Table 3−10. Indirect Address Generation for Load/Store

 

No Modification of

Preincrement or

Postincrement or

 

Predecrement of

Postdecrement of

Addressing Type

Address Register

Address Register

Address Register

Register indirect

*R

Register relative

*+R[ucst5]

 

*−R[ucst5]

Register relative with

*+B14/B15[ucst15]

15-bit constant offset

 

Base + index

*+R[offsetR]

 

*−R[offsetR]

*++R

*R++

*− −R

*R− −

*++R[ucst5]

*R++[ucst5]

*− −R[ucst5]

*R− −[ucst5]

not supported

not supported

*++R[offsetR]

*R++[offsetR]

*− −R[offsetR]

*R− −[offsetR]

Table 3−11. Address Generator Options for Load/Store

 

Mode Field

 

Syntax

Modification Performed

 

 

 

 

 

 

0

0

0

0

*−R[ucst5]

Negative offset

0

0

0

1

*+R[ucst5]

Positive offset

0

1

0

0

*−R[offsetR]

Negative offset

0

1

0

1

*+R[offsetR]

Positive offset

1

0

0

0

*− −R[ucst5]

Predecrement

1

0

0

1

*++R[ucst5]

Preincrement

1

0

1

0

*R− −[ucst5]

Postdecrement

1

0

1

1

*R++[ucst5]

Postincrement

1

1

0

0

*−−R[offsetR]

Predecrement

1

1

0

1

*++R[offsetR]

Preincrement

1

1

1

0

*R− −[offsetR]

Postdecrement

1

1

1

1

*R++[offsetR]

Postincrement

 

 

 

 

 

 

SPRU733

Instruction Set

3-33

Page 93
Image 93
Texas Instruments TMS320C67X/C67X+ DSP 10. Indirect Address Generation for Load/Store, Addressing Type Address Register