Control Register File Extensions

Table 2−16. Floating-Point Multiplier Configuration Register (FMCR) Field Descriptions (Continued)

Bit

Field

Value

Description

 

 

 

 

15−11

Reserved

0

Reserved. The reserved bit location is always read as 0. A value written to this

 

 

 

field has no effect.

 

 

 

 

10−9

RMODE

0−3h

Rounding mode select for .M1.

 

 

0

Round toward nearest representable floating-point number

 

 

1h

Round toward 0 (truncate)

 

 

2h

Round toward infinity (round up)

 

 

3h

Round toward negative infinity (round down)

 

 

 

 

8

UNDER

 

Result underflow status for .M1.

 

 

0

Result does not underflow.

 

 

1

Result underflows.

 

 

 

 

7

INEX

 

Inexact results status for .M1.

 

 

0

 

1Result differs from what would have been computed had the exponent range and precision been unbounded; never set with INVAL.

6

OVER

Result overflow status for .M1.

0Result does not overflow.

1Result overflows.

5

INFO

Signed infinity for .M1.

0Result is not signed infinity.

1Result is signed infinity.

4 INVAL

0A signed NaN (SNaN) is not a source.

1A signed NaN (SNaN) is a source. NaN is a source in a floating-point to integer conversion or when infinity is subtracted from infinity.

3

DEN2

Denormalized number select for .M1 src2.

0src2 is not a denormalized number.

1src2 is a denormalized number.

SPRU733

CPU Data Paths and Control

2-33

Page 59
Image 59
Texas Instruments TMS320C67X/C67X+ DSP manual Rounding mode select for .M1