EXTU Extract and Zero-Extend a Bit Field

Description

src2

dst

The field in src2, specified by csta and cstb, is extracted and zero extended to 32 bits. The extract is performed by a shift left followed by an unsigned shift right. csta and cstb are the amounts to shift left and shift right, respectively. This can be thought of in terms of the LSB and MSB of the field to be extracted. Then csta = 31 − MSB of the field and cstb = csta + LSB of the field. The shift left and shift right amounts may also be specified as the ten LSBs of the src1 register with cstb being bits 0−4 and csta bits 5−9. In the example below, csta is 12 and cstb is 11 + 12 = 23. Only the ten LSBs are valid for the register version of the instruction. If any of the 22 MSBs are non-zero, the result is invalid.

 

 

 

 

 

 

 

 

csta

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

cstb − cst a

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1)

 

x

x

x

x

x

x

x

x

x

x

x

x

1

0

1

0

0

1

1

0

1

x

x

x

x

x

x

x

x

x

x

x

 

31

30

29

28

27 26

25 24 23

22

21

20 19

18

17

16

15

14

13

12

11 10

9

8

7

6

5

4

3

 

2

1

0

 

Shifts left by 12 to produce:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2)

 

 

 

 

 

 

 

 

 

 

x

x

x

x

x

x

x

x

x

x

x

0

0

0

0

0

0

0

0

0

0

0

0

 

1

0

1

0

0

1

1

0

1

 

31

30

29

28

27 26

25 24 23

22

21

20 19

18

17

16

15

14

13

12

11 10

9

8

7

6

5

4

3

 

2

1

0

 

 

Then shifts right by 23 to produce:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3)

 

0

0

0

0

 

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

1

0

0

1

1

0

1

 

31

30

29

28

27 26

25 24 23

22

21

20 19

18

17

16

15

14

13

12

11 10

9

8

7

6

5

4

3

 

2

1

0

Execution

Pipeline

If the constant form is used:

if (cond) src2 extu csta, cstb dst else nop

If the register width and offset form is used:

if (cond) src2 extu src19..5, src14..0 dst else nop

Pipeline

E1

Stage

 

 

Read

src1, src2

Written

dst

Unit in use

.S

 

 

3-114

Instruction Set

SPRU733

Page 174
Image 174
Texas Instruments TMS320C67X/C67X+ DSP manual If cond src2 extu csta, cstb → dst else nop