Texas Instruments TMS320C67X/C67X+ DSP manual 7. Pipeline Phases Block Diagram

Pipeline Operation Overview

Registers used by the instructions in E1 are shaded in Figure 4−7. The multi- plexers used for the input operands to the functional units are also shaded in the figure. The bold crosspaths are used by the MPY and SUBSP instructions.

Figure 4−7. Pipeline Phases Block Diagram

Fetch					256
	LDDW	SUB	ADDSP	SUBSP		MPYSP	MPYSP	MVK	ABSSP	PG
	LDDW	ZERO	SUBSP	ADDSP		MPYSP	MPYSP	CMPLTSP	B	PS
	LDDW	MV	ADDSP	ADDSP		MPYSP	MPYSP	ABSSP	CMPLTSP	PW
	LDDW	SUB	ADDSP	SUBSP		MPYSP	MPYSP	MVK	ABSSP	PR

Decode	32	32	32	32	32	32	32	32
	LDDW	ZERO	SUBSP	ADDSP	MPYSP	MPYSP	CMPLTSP	B

DP

ADDSP CMPLTSP MPYSP LDDW MPYSP ABSSP ADDSP DC

Execute
ADDSP	ABSSP	MPYSP	LDDW		MPYSP		SUBSP	E1
.L1	.S1	.M1	.D1	.D2	.M2	.S2	.L2

														32
15 14 13 12 11 10 9			8	7	6		5	4	3		2	1	0			15 14 13 12 11 10 9					8	7	6	5	4		3	2	1	0
Register file A						Data 1					32						32		Data 2							Register file B
										Data memory interface control
	32										16			16		16		16											32
									0		1		2	3	4	5	6	7
									8		9
		Data address 1																		Data address 2

Internal data memory (byte addressable)

4-10 Pipeline SPRU733