Texas Instruments TMS320C67X/C67X+ DSP manual Delay Slots Functional Unit Latency See Also Example

CMPGTDP Compare for Greater Than, Double-Precision Floating-Point Values (C67x CPU)

Note:

No configuration bits other than those shown above are set, except the NaNn and DENn bits when appropriate.

Pipeline
	Pipeline	E1	E2
	Stage
	Read	src1_l	src1_h
		src2_l	src2_h
	Written		dst
	Unit in use	.S	.S

Instruction Type		DP compare
Delay Slots		1
Functional Unit		2
Latency
See Also		CMPEQDP, CMPGT, CMPGTSP, CMPGTU, CMPLTDP
Example		CMPGTDP .S1 A1:A0,A3:A2,A4
	Before instruction					2 cycles after instruction
A1:A0
	4021 3333h		3333 3333h	8.6	A1:A0	4021	3333h	3333	3333h
A3:A2	c004 0000h		0000 0000h	−2.5	A3:A2	c004	0000h	0000	0000h
A4	XXXX XXXXh				A4	0000	0001h	true

8.6 −2.5

3-90 Instruction Set SPRU733