Pipeline Execution of Instruction Types

Table 4−2. Execution Stage Length Description for Each Instruction Type (Continued)

 

 

Instruction Type

 

Execution

 

 

 

 

 

 

 

 

phases

ADDDP/SUBDP

MPYI

MPYID

MPYDP

 

 

 

 

 

E1

Read lower sources

Read sources and

Read sources and

Read lower sources

 

and start computation

start computation

start computation

and start computation

E2

Read upper sources

Read sources and

Read sources and

Read lower src1 and

 

and continue

continue computation

continue computation

upper src2 and

 

computation

 

 

continue computation

E3

Continue computation

Read sources and

Read sources and

Read lower src2 and

 

 

continue computation

continue computation

upper src1 and

 

 

 

 

continue computation

E4

Continue computation

Read sources and

Read sources and

Read upper sources

 

 

continue computation

continue computation

and continue

 

 

 

 

computation

E5

Continue computation

Continue computation

Continue computation

Continue computation

E6

Compute the lower

Continue computation

Continue computation

Continue computation

 

results and write to

 

 

 

 

register

 

 

 

E7

Compute the upper

Continue computation

Continue computation

Continue computation

 

results and write to

 

 

 

 

register

 

 

 

E8

 

Continue computation

Continue computation

Continue computation

E9

 

Complete computa-

Continue computation

Continue computation

 

 

tion and write results

and write lower

and write lower

 

 

to register

results to register

results to register

E10

 

 

Complete computa-

 

 

 

tion and write upper

 

 

 

results to register

Delay slots

6

8

9

Functional

2

4

4

unit latency

 

 

 

Complete computa- tion and write upper results to register

9

4

Notes: 1) This table assumes that the condition for each instruction is evaluated as true. If the condition is evaluated as false, the instruction does not write any results or have any pipeline operation after E1.

2) NOP is not shown and has no operation in any of the execution phases.

4-14

Pipeline

SPRU733

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Image 346
Texas Instruments TMS320C67X/C67X+ DSP manual Instruction Type Execution Phases, ADDDP/SUBDP Mpyi Mpyid Mpydp