Texas Instruments TMS320C67X/C67X+ DSP manual Single-Cycle Instructions, Unit in use M, or .D

Pipeline Execution of Instruction Types

4.2.1Single-Cycle Instructions

Single-cycle instructions complete execution during the E1 phase of the pipe- line (see Table 4−3). Figure 4−8 shows the fetch, decode, and execute phases of the pipeline that single-cycle instructions use.

Figure 4−9 shows the single-cycle execution diagram. The operands are read, the operation is performed, and the results are written to a register, all during E1. Single-cycle instructions have no delay slots.

Table 4−3. Single-Cycle Instruction Execution

Pipeline Stage	E1
Read	src1
	src2
Written	dst
Unit in use	.L, .S., .M, or .D

Figure 4−8. Single-Cycle Instruction Phases

PG

PS PW PR

DP

DC

E1

Figure 4−9. Single-Cycle Instruction Execution Block Diagram

Operands (data)

Functional

unit

.L, .S, .M,

or .D

Write results
Register file	E1

4-16 Pipeline SPRU733