Texas Instruments TMS320C67X/C67X+ DSP manual TMS320C67x DSP Architecture

TMS320C67x DSP Architecture

1.4 TMS320C67x DSP Architecture

Figure 1−1 is the block diagram for the C67x DSP. The C6000 devices come with program memory, which, on some devices, can be used as a program cache. The devices also have varying sizes of data memory. Peripherals such as a direct memory access (DMA) controller, power-down logic, and external memory interface (EMIF) usually come with the CPU, while peripherals such as serial ports and host ports are on only certain devices. Check the data sheet for your device to determine the specific peripheral configurations you have.

Figure 1−1. TMS320C67x DSP Block Diagram

Program cache/program memory 32-bit address 256-bit data

C6000 CPU

Power down

DMA, EMIF

Program fetch

Instruction dispatch (See Note)

Instruction decode

Data path A	Data path B
Register file A	Register file B
.L1 .S1 .M1 .D1	.D2 .M2 .S2 .L2

Control registers

Control

logic

Test

Emulation

Interrupts

Data cache/data memory

32-bit address

8-, 16-, 32-bit data

Additional

peripherals:

Timers, serial ports, etc.

SPRU733 Introduction 1-7