Texas Instruments TMS320C67X/C67X+ DSP manual Figure F−1 or 2 Sources Instruction Format

32-Bit Opcode Maps

F.3 32-Bit Opcode Maps

The C67x CPU 32-bit opcodes used in the .S unit are mapped in Figure F−1 through Figure F−11.

Figure F−1. 1 or 2 Sources Instruction Format

31 29 28 27 23 22 18 17 13 12 11 6 5 4 3 2 1 0

creg

z

dst

src2

src1

x

op

1 0 0 0 s p

3 1 5 5 5 1 6 1 1

Figure F−2. Extended .S Unit 1 or 2 Sources Instruction Format

31 29 28 27 23 22 18 17 13 12 11 10 9 6 5 4 3 2 1 0

creg

z

dst

src2

src1

x 1 1

op

1 1 0 0 s p

3 1 5 5 5 1 4 1 1

Figure F−3. Extended .S Unit 1 or 2 Sources, Nonconditional Instruction Format

31 29 28 27 23 22 18 17 13 12 11 10 9 6 5 4 3 2 1 0

0 0 0 z

dst

src2

src1

x

1

1

op

1 1 0 0 s p

1 5 5 5 1 4 1 1

Figure F−4. Unary Instruction Format

31 29 28 27 23 22 18 17 13 12 11 5 4 3 2 1 0

creg

z

dst

src2

op

x

1 1 1 1 0 0 1 0 0 0 s p

3 1 5 5 5 1 1 1

Figure F−5. Extended .S Unit Branch Conditional, Immediate Instruction Format

31 29 28 27 7 6 5 4 3 2 1 0

creg	z
3	1

cst21	0	0	1	0	0	s	p
21	1						1

F-4 .S Unit Instructions and Opcode Maps SPRU733