Texas Instruments TMS320C67X/C67X+ DSP manual Figure G−1. Loop Buffer Instruction Format

32-Bit Opcode Maps

G.3 32-Bit Opcode Maps

The C67x CPU 32-bit opcodes used in the no unit instructions are mapped in Figure G−1 through Figure G−3.

Figure G−1. Loop Buffer Instruction Format

31 29 28 27 23 22 18 17 16 13 12 11 10 9 8 7 6 5 4 3 2 1 0

creg

z

cstb

csta

1

op

0 0 0 0 0 0 0 0 0 0 0 s p

3 1 5 5 4 1 1

Figure G−2. NOP and IDLE Instruction Format

31 29 28 27 18 17 16 13 12 11 10 9 8 7 6 5 4 3 2 1 0

0 0 0 1

Reserved (0)

0

op

0 0 0 0 0 0 0 0 0 0 0 s p

10 4 1 1

Figure G−3. Emulation/Control Instruction Format

31 29 28 27 23 22 18 17 16 13 12 11 10 9 8 7 6 5 4 3 2 1 0

creg

zReserved (0)

cst5

0

op

0 0 0 0 0 0 0 0 0 0 0 s p

3 1 5 5 4 1 1

SPRU733 No Unit Specified Instructions and Opcode Maps G-3