Texas Instruments TMS320C67X/C67X+ DSP manual Smpylh, MPYLH, SMPY, SMPYH, Smpyhl

SMPYLH Multiply Signed 16 LSB x Signed 16 MSB With Left Shift and Saturation

SMPYLH				Multiply Signed 16 LSB y Signed 16 MSB With Left Shift and Saturation
Syntax				SMPYLH (.unit) src1, src2, dst
				.unit = .M1 or .M2
Compatibility				C62x, C64x, C67x, and C67x+ CPU
Opcode
31	29	28	27	23	22	18	17	13	12	11	7	6	5	4	3	2	1	0

creg

z

dst

src2

src1

x

1 0 0 1 0 0

0 0 0 0 s p

3	1	5	5	5	1	1	1
			Opcode map field used...	For operand type...		Unit
			src1	slsb16		.M1, .M2
			src2	xsmsb16
			dst	sint

Description

Execution

Pipeline

The src1 operand is multiplied by the src2 operand. The result is left shifted by 1 and placed in dst. If the left-shifted result is 8000 0000h, then the result is saturated to 7FFF FFFFh. If a saturation occurs, the SAT bit in CSR is set one cycle after dst is written.

if (cond) {

if (((src1 ￿ src2) << 1) != 8000 0000h) ((src1 ￿ src2) << 1) → dst

else

7FFF FFFFh → dst

}

else nop

Pipeline

StageE1 E2

Read src1, src2

Writtendst

Unit in use .M

Instruction Type	Single-cycle (16 ⋅ 16)
Delay Slots	1
See Also	MPYLH, SMPY, SMPYH, SMPYHL

3-224 Instruction Set SPRU733