KS152JB Universal Communications Controller Technical Specifications
TCDCNT (0D4H) - Transmit Collision Detect Count Contains the number of collisions that have occurred if probabilistic CSMA/CD is used. The user software must clear this register before transmitting a new frame so that the GSC backoff hardware can accurately distinguish a new frame from a retransmit attempt.
In deterministic backoff mode, TCDCNT is used to hold the maximum number of slots.
TFIFO (85H) - GSC Transmit FIFO - TFIFO is a 3 byte buffer with an associated pointer that is automatically updated for each write by user software. Writing a byte to TFIFO loads the data into the next available location in the transmit FIFO. Setting TEN clears the transmit FIFO so the transmit FIFO should not be written to prior to setting TEN. If TEN is already set transmission begins as soon as data is written to TFIFO.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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LNI | NOACK | UR | TCDT | TDN | TFNF | TEN | DMA |
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TSTAT (0D8) - Transmit Status Register
TSTAT.0 (DMA) - DMA Select - if set, indicates that DMA channels are used to service the GSC FIFO’s and GSC interrupts occur on TDN and RDN, and also enables UR to become set. If cleared, indicates that the GSC is operating in its normal mode and interrupts occur on TFNF and RFNE. For more information on DMA servicing please refer to the DMA section on DMA serial demand mode (4.2.2.3). The user software is responsible for setting or clearing this flag.
TSTAT.1 (TEN) - Transmit Enable - When set causes TDN, UR, TCDT, and NOACK flag to be reset and the TFIFO cleared. The transmitter will clear TEN after a successful transmission, a col- lision during the data, CRC, or end flag. The user software is responsible for setting but the GSC or user software is responsible for setting but the GSC or user software may clear this flag. If cleared during a transmission the GSC transmit pin goes to a steady state high level. This is the method used to send an abort character in SDLC. Also DEN is forced to a high level. The end of transmission occurs whenever the TFIFO is emptied.
TSTAT.2 (TFNF) - Transmit FIFO not full - When set, indicates that new data may be written into the transmit FIFO. The transmit FIFO is a three byte buffer that loads the transmit shift register with data. The status of this flag is controlled by the GSC.
TSTAT.3 (TDN) - Transmit Done
Kawasaki LSI USA, Inc. | Page 74 of 120 | Ver. 0.9 KS152JB2 |
