
KS152JB Universal Communications Controller Technical Specifications
| Table 1: PIN DESCRIPTION |
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Port 3 | Port 3 is an |
| 1s written to them are pulled high by the internal pullups, and in that state can be |
| used as inputs. As inputs, Port 3 pins that are externally being pulled low will |
| source current (IIL, on the data sheet) because of the pullups. Port 3 also serves the |
| functions of various special features of the |
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| Pin | Name | Alternate Function | |||||
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| P3.0 |
| RXD | Serial input line | ||||
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| P3.1 |
| TXD | Serial output line | ||||
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| P3.2 |
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| External interrupt 0 |
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| INT0 | ||||||
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| P3.3 |
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| External interrupt 1 |
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| INT1 | ||||||
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| P3.4 |
| T0 | Timer 0 external input | ||||
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| P3.5 |
| T1 | Timer 1 external input | ||||
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| P3.6 |
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| External Data Memory Write strobe | |
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| WR | ||||||
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| P3.7 |
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| External Data Memory Read strobe | ||
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| RD | |||||
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| Port 4 | Port 4 is an | ||||||||
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| 1s written to them are pulled high by the internal pullups, and in that state can be | |||||||
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| used as inputs. As inputs, Port 4 pins that are externally being pulled low will | |||||||
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| source current (IIL, on the data sheet) because of the internal pullups. In addition, | |||||||
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| Port 4 also receives the | |||||||
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| Port 5 | Port 5 is an | ||||||||
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| 1s written to them are pulled high by the internal pullups, and in that state can be | |||||||
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| used as inputs. As inputs, Port 5 pins that are externally being pulled low will | |||||||
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| source current (IIL, on the data sheet) because of the internal pullups. | |||||||
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| Port 5 is also the multiplexed | |||||||
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| external program memory if EBEN is puled high. In this application it uses strong | |||||||
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| pullups when emitting 1s. |
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| Port 6 | Port 6 is an | ||||||||
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| 1s written to them are pulled high by the internal pullups, and in that state can be | |||||||
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| used as inputs. As inputs, Port 6 pins that are externally pulled low will source | |||||||
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| current (ILL, on the data sheet) because of the internal pullups. Port 6 emits the | |||||||
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| is pulled high. In this application it uses strong pullups when emitting 1s. | |||||||
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| XTAL1 | Input to the inverting oscillator amplifier and input to the internal clock generating | ||||||||
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| circuits. |
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| XTAL2 | Output from the oscillator amplifier. | ||||||||
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| Reset input. A logic low on this pin for three machine cycles while the oscillator is | |||||||
| RST | |||||||||
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| running resets the device. An internal pullup resistor permits a power on reset to | |||||||
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| be generated using only an external capacitor to VSS. Although the GSC recog- | |||||||
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| nizes the reset after three machine cycles, data may continue to be transmitted for | |||||||
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| up to 4 machine cycles after Reset is first applied. |
Kawasaki LSI USA, Inc. | Page 4 of 120 | Ver. 0.9 KS152JB2 |