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Functional Overview
2.4SMC functional operation
This section describes:
•Operating states
•Clocking and resets on page
•Miscellaneous signals on page
•APB slave interface operation on page
•Format block on page
•Memory manager operation on page
•Interrupts operation on page
•Memory interface operation on page
2.4.1Operating states
The operation of the SMC is based on three operating states. In this section, each state is described. Figure
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Figure 2-10 SMC aclk domain FSM
The SMC states are as follows:
Reset | Power is applied to the device, and hresetn is held LOW. |
Ready Normal operation of the device. You can access the SMC register bank through the AHB configuration port and external memory devices accessed through the SMC interface.
ARM DDI 0389B | Copyright © 2006 ARM Limited. All rights reserved. |