Programmer’s Model
Note
Figure
Figure
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Figure 3-4 SMC user configuration register map
Figure
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Figure
Table
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| Table |
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Name | Base offset | Type | Reset value | Description |
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smc_memc_status | 0x1000 | RO | 0x00000000 | See SMC Memory Controller Status Register at |
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| 0x1000 on page |
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smc_memif_cfg | 0x1004 | RO | 0x0000002D | See SMC Memory Interface Configuration |
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| Register at 0x1004 on page |
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smc_memc_cfg_set | 0x1008 | WO | N/A | See SMC Set Configuration Register at 0x1008 |
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| on page |
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smc_memc_cfg_clr | 0x100C | WO | N/A | See SMC Clear Configuration Register at |
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| 0x100C on page |
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smc_direct_cmd | 0x1010 | WO | N/A | See SMC Direct Command Register at 0x1010 |
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| on page |
Copyright © 2006 ARM Limited. All rights reserved. | ARM DDI 0389B |