Programmer’s Model for Test
4.1SMC integration test registers
Test registers are provided for integration testing.
Figure
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smc_int_cfg | 0x1E00 | R/W | 0x0 | SMC Integration Configuration Register at 0x1E00 | |
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smc_int_inputs | 0x1E04 | RO | - | Integration Inputs Register at 0x1E04 on page | |
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smc_int_outputs | 0x1E08 | WO | - | Integration Outputs Register at 0x1E08 on page | |
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4.1.1SMC Integration Configuration Register at 0x1E00
The read/write smc_int_cfg Register selects the integration test registers. This register is only for test. This register cannot be read or written to in the Reset state.
Figure
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Copyright © 2006 ARM Limited. All rights reserved. | ARM DDI 0389B |