Monaco Technical Reference

Spectrum Signal Processing

Interrupt Handling

8.8.Inter-processor Interrupts

The Inter-processor interrupts (VINTx) are shared with the SCV interrupt. They allow any processor to interrupt any other processor through the VINTx registers. There are four of these registers; one for each of the processors.

To generate an interrupt to a particular processor, a “1” is written to bit D0 of the VINT register corresponding to the processor to be interrupted. These registers are accessible from any of the four processors. Node C, for example, can interrupt node B by writing “1” to the VINTB Register (address 016D 8008h).

The VSTATUS Register (address 016D 8000h) also indicates that a node has a pending interrupt whenever any of the following bits is set to “1”:

Bit

Interrupted Node

D8

Node A

D9

Node B

D10

Node C

D11

Node D

A processor clears an interrupt by clearing its corresponding bit VINTx register. In the case where node C interrupts node B, for example, node B would clear the interrupt by writing “0” to the VINTB Register (address 016D 8008h).

8.9.VME Host Interrupts To Any Node

A VME host can interrupt a particular node on the Monaco board using DSPINT in the HPIC register of the Host Port Interface (HPI). Refer to the TMS320C6x documentation for further information on using DSPINT.

44

Part Number 500-00191

 

Revision 2.00

Page 56
Image 56
Spectrum Brands C6x VME64 manual Inter-processor Interrupts, VME Host Interrupts To Any Node