| Delta DOP Series HMI Connection |
Copley Servo (Stepnet Protocol) | Back to Table |
A. HMI factory setting |
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Baud rate: 9600, 8, None, 1.
PLC station number: 0.
Control area/status area: None.
B. Definition of controller Read/Write address
Registers
Register Type | Format | Read/Write Range |
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RAM memory | Rn | n: | N/A |
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Flash memory | Fn | n: | N/A |
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Internal Register | IRn | n: | N/A |
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Contacts |
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Contact Type | Format | Read/Write Range |
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Word No. | Bit No. |
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BIT_DEVICE_RB | RBn.b | n: | b: |
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BIT_DEVICE_FB | FBn.b | n: | b: |
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BIT_DEVICE_T0 | T0n | N/A | n: 0 |
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BIT_DEVICE_T1 | T1n | N/A | n: 0 |
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BIT_DEVICE_T2 | T2n | N/A | n: 0 |
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BIT_DEVICE_RST | RSTn | N/A | n: 0 |
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BIT_DEVICE_CPR | CPRn | n: | N/A |
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BIT_DEVICE_CPF | CPFn | n: | N/A |
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NOTE
1)RB and FB are the bit access of Ram/Flash memory. Therefore, RB0x21.14 indicates bit 14 of Ram memory 0x21.
2)T0, T1 and T2 is virtual device for simulating Trajectory Generator Command. The number of 0, 1 and 2 indicates the subcommand of that command, so only bit 0 is acceptable.
3)RST is for simulating Reset Command, so only bit 0 is acceptable.
4)CPR and CPF are for simulating Copy Command of Ram and Flash individually. The address (n) after CPR and CPF is just the copy address for Ram/Flash memory. For example, CPRCA indicates that the content of Ram memory 0xCA will be copied into Flash memory 0xCA and CPFA6 indicates that the content of Flash memory 0xA6 will be copied into Ram memory 0xA6.
5)T0, T1, T2, RST, CPR, CPF are all
Revision January, 2008, Doc. Name: 2007PDD23000007 |
