Freescale Semiconductor MC68HC08KH12 manual 122

bit can be set to 1 by the host request only. It can be cleared either by hardware when a fault condition was detected or by software through the host request. Reset clears this bit.

1 = Downstream port is enabled

0 = Downstream port is disabled

LOWSP1-LOWSP4 — Full Speed / Low Speed Port Control Bit

This read/write bit specifies the attached device in the downstream port is low speed device or full speed device. Software is responsible to detect the device attachment and whether a device is full or low speed. Reset clears this bit.

1 = Downstream port is low speed

0 = Downstream port is full speed

NOTE: after a port is enabled, HUB will automatically generate a low speed keep awake signal to the port every millisecond.

RST1-RST4 — Force Reset to the Downstream Port

This read/write bit forces a reset signal (SE0 state) onto the USB downstream port data lines. This bit can be set by the host request SetPortFeature (PORT_RESET) only. Software should control the timing of the forced reset signaling downstream for at least 10 ms. Reset clears this bit.

1 = Force downstream port data lines to SE0 state 0 = Default

RESUM1-RESUM4 — Force Resume to the Downstream Port

This read/write bit forces a resume signal (“K” state) onto the USB downstream port data lines. This bit is set to reflect the resume signal when the software detects the remote resume signal on the data lines of the selective suspend downstream port. Downstream selective resume sequence to a port may also be initiated via the host request ClearPortFeature (PORT_SUSPEND). Software should control the timing of the forced resume signaling downstream for at least 20 ms. To indicate the end of the resume, a low speed EOP signal will be followed when this control bit changes from 1 to 0. Reset clears this bit.

1	= Force downstream port data lines to “K” state
0	= Default
Advance Information	MC68HC(7)08KH12 — Rev. 1.1
122	Freescale Semiconductor