Freescale Semiconductor MC68HC08KH12 manual 130

Models: MC68HC08KH12

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TSEQ — HUB Endpoint 0 Transmit Sequence Bit

This read/write bit determines which type of data packet (DATA0 or DATA1) will be sent during the next IN transaction directed at Endpoint 0. Toggling of this bit must be controlled by software. Reset clears this bit.

1 = DATA1 Token active for next HUB Endpoint 0 transmit 0 = DATA0 Token active for next HUB Endpoint 0 transmit

STALL0 — HUB Endpoint 0 Force Stall Bit

This read/write bit causes HUB Endpoint 0 to return a STALL handshake when polled by either an IN or OUT token by the host. The USB hardware clears this bit when a SETUP token is received. Reset clears this bit.

1 = Send STALL handshake

0 = Default

TXE — HUB Endpoint 0 Transmit Enable

This read/write bit enables a transmit to occur when the USB Host controller sends an IN token to the HUB Endpoint 0. Software should set this bit when data is ready to be transmitted. It must be cleared by software when no more HUB Endpoint 0 data packets needs to be transmitted. If this bit is 0 or the TXDF is set, the USB will respond with a NAK handshake to any HUB Endpoint 0 IN tokens. Reset clears this bit.

1 = Data is ready to be sent

0 = Data is not ready. Respond with NAK

RXE — HUB Endpoint 0 Receive Enable

This read/write bit enables a receive to occur when the USB Host controller sends an OUT token to the HUB Endpoint 0. Software should set this bit when data is ready to be received. It must be cleared by software when data cannot be received. If this bit is 0 or the RXDF is set, the USB will respond with a NAK handshake to any HUB Endpoint 0 OUT tokens. Reset clears this bit.

1 = Data is ready to be received

0 = Not ready for data. Respond with NAK

Advance Information

MC68HC(7)08KH12 Rev. 1.1

 

 

130

Freescale Semiconductor

Page 130
Image 130
Freescale Semiconductor MC68HC08KH12 manual 130