MC68HC(7)08KH12Rev. 1.1 Advance Information
Freescale Semiconductor 9
8.7 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
8.8 Special Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
8.8.1 Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
8.8.2 CGM During Break Interrupts . . . . . . . . . . . . . . . . . . . . . .108
8.9 Acquisition/Lock Time Specifications . . . . . . . . . . . . . . . . . . .108
8.9.1 Acquisition/Lock Time Definitions . . . . . . . . . . . . . . . . . . .108
8.9.2 Parametric Influences on Reaction Time . . . . . . . . . . . . .109
8.9.3 Choosing a Filter Capacitor. . . . . . . . . . . . . . . . . . . . . . . .111
8.9.4 Reaction Time Calculation . . . . . . . . . . . . . . . . . . . . . . . .111
Section 9. Universal Serial Bus Module (USB)
9.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113
9.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .114
9.3 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
9.4 I/O Register Description of the HUB function . . . . . . . . . . . . .116
9.4.1 USB HUB Root Port Control Register (HRPCR). . . . . . . . 120
9.4.2 USB HUB Downstream Port Control Register
(HDP1CR-HDP4CR) . . . . . . . . . . . . . . . . . . . . . . . . . . 121
9.4.3 USB SIE Timing Interrupt Register (SIETIR). . . . . . . . . . .123
9.4.4 USB SIE Timing Status Register (SIETSR) . . . . . . . . . . .125
9.4.5 USB HUB Address Register (HADDR) . . . . . . . . . . . . . . .127
9.4.6 USB HUB Interrupt Register 0 (HIR0). . . . . . . . . . . . . . . . 128
9.4.7 USB HUB Control Register 0 (HCR0). . . . . . . . . . . . . . . . 129
9.4.8 USB HUB Endpoint1 Control & Data Register (HCDR) . .131
9.4.9 USB HUB Status Register (HSR) . . . . . . . . . . . . . . . . . . .132
9.4.10 USB HUB Endpoint 0 Data Registers 0-7
(HE0D0-HE0D7). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134
9.5 I/O Register Description of the Embedded Device Function .134
9.5.1 USB Embedded Device Address Register (DADDR) . . . .138
9.5.2 USB Embedded Device Interrupt Register 0 (DIR0). . . . . 138
9.5.3 USB Embedded Device Interrupt Register 1 (DIR1). . . . . 140
9.5.4 USB Embedded Device Control Register 0 (DCR0) . . . . .141
9.5.5 USB Embedded Device Control Register 1 (DCR1) . . . . .143
9.5.6 USB Embedded Device Status Register (DSR) . . . . . . . . 144