When bit DDRFx is a logic one, reading address $0009 reads the PTFx data latch. When bit DDRFx is a logic zero, reading address $0009 reads the voltage level on the pin. The data latch can always be written, regardless of the state of its data direction bit. Table
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| Accesses to | Accesses to PTE | ||
DDRE | PTE | I/O Pin Mode | DDRE | |||
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| Read/Write | Read | Write | |||
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0 | X(1) | Input, | DDRF[7:0] | Pin | PTF[7:0](3) | |
1 | X | Output | DDRF[7:0] | PTF[7:0] | PTF[7:0] | |
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1.X = don’t care
2.
3.Writing affects data register, but does not affect input.
12.9 Port Options
All pins of port A, port B and port C have programmable pullup resistors.
Port C also has LED drive capability.
12.9.1 Port Option Control Register (POC)
The pullup option for each port is controlled by one bit in the port option control register. One bit controls the LED drive configuration on port C.
Address:
Read:
Write:
Reset:
$001D |
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Bit 7 | 6 | 5 | 4 | 3 | 2 | 1 | Bit 0 |
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0 | 0 | LDD | 0 | 0 | PCP | PBP | PAP |
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0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
| = Unimplemented |
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Figure 12-22. Port Option Control Register (POC)
Advance Information | MC68HC(7)08KH12 — Rev. 1.1 |
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204 | Freescale Semiconductor |