Freescale Semiconductor MC68HC08KH12 manual DC Electrical Characteristics, 250

17.6 DC Electrical Characteristics

	Characteristic		Symbol	Min	Typ(2)	Max	Unit
Output High Voltage			VOH	VDD – 0.8	—	—	V
(ILOAD = –2.0mA) All I/O Pins
Output Low Voltage			VOL	—	—	0.4	V
(ILOAD = 1.6mA) All I/O Pins
Input High Voltage			VIH	0.7 ⋅ VDD	—	V DD	V
All ports, IRQ1/VPP, RST, OSC1
Input Low Voltage			VIL	VSS	—	0.3 ⋅ VDD	V
All ports, IRQ1/VPP, RST, OSC1
Output High Current			IOH	3	4.5	6	mA
(VOH = 2.1V) Port C in LDD mode
Output Low Current			IOL	10	15	20	mA
(VOL = 2.3V) Port C in LDD mode
VDD Supply Current
Run, USB active, PLL on, fOP = 6.0MHz(3)				—	—	20	mA
Run, USB suspended, PLL off, fOP = 1.5MHz(3)			IDD	—	—	3	mA
Wait (4)				—	—	1	mA
Stop(5) 0°C to 85°C				—	—	350	∝A
I/O Ports Hi-Z Leakage Current			IIL	—	—	±10	∝A
Input Current			IIN	—	—	±1	∝A
Capacitance			COUT	—	—	12	pF
Ports (as Input or Output)			CIN	—	—	8
POR ReArm Voltage(6)			VPOR	0	—	100	mV
POR Rise Time Ramp Rate(7)			RPOR	0.035	—	—	V/ms
Monitor Mode Entry Voltage			VDD+VHI	1.4 ⋅ VDD		2.0 ⋅ VDD	V
Pullup resistor							kΩ
PA0-PA7, PB0-PB7, PC0-PC7, PD0-PD7, PE0-			RPU	20	35	50
PE3, PF0-PF7,
	RST,	IRQ1/VPP
Schmitt Trigger Input High Level			VSHI	2.8		3.4	V
PD0-PD7, PE0-PE3, PF0-PF7
Schmitt Trigger Input Low Level			VSHL	1.7		2.3	V
PD0-PD7, PE0-PE3, PF0-PF7

NOTES:

1.VDD = 4.0 to 5.5 Vdc, VSS = 0 Vdc, TA = TL to TH, unless otherwise noted.

2.Typical values reflect average measurements at midpoint of voltage range, 25 °C only.

3.Run (operating) IDD measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects run IDD. Measured with all modules enabled.

4.Wait IDD measured using external square wave clock source (fCGMXCLK = 6 MHz); all inputs 0.2 V from rail; no dc loads; less than 100 pF on all outputs. CL = 20 pF on OSC2; USB in suspend mode, 15 KΩ ± 5% termination resistors on D+ and D– pins; all ports config-

ured as inputs; OSC2 capacitance linearly affects wait IDD.

5.STOP IDD measured with USB in suspend mode, OSC1 grounded, 1.425 KΩ ± 1% pull-up resistor on D+ pin and 15 KΩ ± 1% pull- down resistors on D+ and D– pins, no port pins sourcing current.

6.Maximum is highest voltage that POR is guaranteed.

7.If minimum VDD is not reached before the internal POR reset is released, RST must be driven low externally until minimum VDD is reached.

8.RPU is measured at VDD = 5.0V.

Advance Information	MC68HC(7)08KH12 — Rev. 1.1
250	Freescale Semiconductor