Freescale Semiconductor MC68HC08KH12 manual Prescaler Selection, 175

NOTE: Do not set the TSTOP bit before entering wait mode if the TIM is required to exit wait mode.

TRST — TIM Reset Bit

Setting this write-only bit resets the TIM counter and the TIM prescaler. Setting TRST has no effect on any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIM counter is reset and always reads as logic zero. Reset clears the TRST bit.

1 = Prescaler and TIM counter cleared

0 = No effect

NOTE: Setting the TSTOP and TRST bits simultaneously stops the TIM counter at a value of $0000.

PS[2:0] — Prescaler Select Bits

These read/write bits select either the PTE0/TCLK pin or one of the seven prescaler outputs as the input to the TIM counter as Table 11-2shows. Reset clears the PS[2:0] bits.

			Table 11-2. Prescaler Selection
PS2	PS1	PS0		TIM Clock Source
0	0	0		Internal Bus Clock ÷ 1
0	0	1		Internal Bus Clock ÷ 2
0	1	0		Internal Bus Clock ÷ 4
0	1	1		Internal Bus Clock ÷ 8
1	0	0		Internal Bus Clock ÷ 16
1	0	1		Internal Bus Clock ÷ 32
1	1	0		Internal Bus Clock ÷ 64
1	1	1		PTE0/TCLK

11.9.2 TIM Counter Registers (TCNTH:TCNTL)

The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter. Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent reads of

MC68HC(7)08KH12 — Rev. 1.1	Advance Information
Freescale Semiconductor	175